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Quantitative Analysis of Control Flow Checking Mechanisms for Soft Errors

Published: 01 June 2014 Publication History

Abstract

Control Flow Checking (CFC) based techniques have gained a reputation of providing effective, yet low-overhead protection from soft errors. The basic idea is that if the control flow -- or the sequence of instructions that are executed -- is correct, then most probably the execution of the program is correct. Although researchers claim the effectiveness of the proposed CFC techniques, we argue that their evaluation has been inadequate and can even be wrong! Recently, the metric of vulnerability has been proposed to quantify the susceptibility of computation to soft errors. Laced with this comprehensive metric, we quantitatively evaluate the effectiveness of several existing CFC schemes, and obtain surprising results. Our results show that existing CFC techniques are not only ineffective in protecting computation from soft errors, but that they incur additional power and performance overheads. Software-only CFC protection schemes (CFCSS [14], CFCSS+NA [2], and CEDA [18]) increase system vulnerability by 18% to 21% with 17% to 38% performance overhead; Hybrid CFC protection technique, CFEDC [4] also increases the vulnerability by 5%; While the vulnerability remains almost the same for hardware only CFC protection technique, CFCET [15], they cause overheads of design cost, area, and power due to the hardware modifications required for their implementations.

References

[1]
Alkhalifa, Z., Nair, V. S. S., Krishnamurthy, N., and Abraham, J. A. Design and Evaluation of System-Level Checks for On-Line Control Flow Error Detection. IEEE Trans. Parallel Distrib. Syst. 10, 6 (June 1999), 627--641.
[2]
Chao, W., Zhongchuan, F., Hongsong, C., Wei, B., Bin, L., Lin, C., Zexu, Z., Yuying, W., and Gang, C. CFCSS without Aliasing for SPARC Architecture. In International Conference on Computer and Information Technology (CIT) (29 2010-july 1 2010), pp. 2094--2100.
[3]
Eifert, J., and Shen, J. Processor Monitoring Using Asynchronous Signatured Instruction Streams. In Twenty-Fifth International Symposium on Fault-Tolerant Computing (jun 1995), p. 106.
[4]
Farazmand, N., Fazeli, M., and Miremadi, S. FEDC: Control Flow Error Detection and Correction for Embedded Systems without Program Interruption. In Third International Conference on Availability, Reliability and Security (march 2008), pp. 33--38.
[5]
Goloubeva, O., Rebaudengo, M., Sonza Reorda, M., and Violante, M. Soft-error detection using control flow assertions. In IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (nov. 2003), pp. 581--588.
[6]
Guthaus, M. R., Ringenberg, J. S., Ernst, D., Austin, T. M., Mudge, T., and Brown, R. B. MiBench: A free, commercially representative embedded benchmark suite. In Proceedings of the IEEE International Workshop on Workload Characterization (Washington, DC, USA, 2001), IEEE Computer Society, pp. 3--14.
[7]
Kayali, S. Reliability Considerations for Advanced Microelectronics. In Proceedings of the 2000 Pacific Rim International Symposium on Dependable Computing (Washington, DC, USA, 2000), PRDC '00, IEEE Computer Society, p. 99.
[8]
Madeira, H., and Silva, J. On-line signature learning and checking: experimental evaluation. In Proceedings of 5th Annual European Computer Conference (may 1991), pp. 642--646.
[9]
May, T. Soft Errors in VLSI: Present and Future. IEEE Transactions on Components, Hybrids, and Manufacturing Technology 2, 4 (dec 1979), 377--387.
[10]
Michel, T., Leveugle, R., and Saucier, G. A New Approach to Control Flow Checking without Program Modification. In Twenty-First International Symposium on Fault-Tolerant Computing (jun 1991), pp. 334 --341.
[11]
Mukherjee, S. Architecture Design for Soft Errors. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA, 2008.
[12]
Mukherjee, S. S., Weaver, C., Emer, J., Reinhardt, S. K., and Austin, T. A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor. IEEE/ACM International Symposium on Microarchitecture 0 (2003), 29.
[13]
Nicolescu, B., Savaria, Y., and Velazco, R. Software detection mechanisms providing full coverage against single bit-flip faults. IEEE Transactions on Nuclear Science 51, 6 (dec. 2004), 3510--3518.
[14]
Oh, N., Shirvani, P., and McCluskey, E. Control-flow checking by software signatures. IEEE Transactions on Reliability 51, 1 (mar 2002), 111--122.
[15]
Rajabzadeh, A., and Miremadi, S. CFCET: A Hardware-based Control Flow Checking Technique in COTS Processors using Execution Tracing. Microelectronics Reliability 46, 5 (2006), 959--972.
[16]
Saxena, N. R., and McCluskey, W. K. Control-Flow Checking Using Watchdog Assists and Extended-Precision Checksums. IEEE Transactions on Computing 39, 4 (Apr. 1990), 554--559.
[17]
Schuette, M. A., and Shen, J. P. Processor Control Flow Monitoring Using Signatured Instruction Streams. IEEE Trans. Comput. 36, 3 (Mar. 1987), 264--276.
[18]
Vemu, R., and Abraham, J. CEDA: Control-Flow Error Detection Using Assertions. IEEE Transactions on Computers 60, 9 (Sept. 2011), 1233--1245.
[19]
Vemu, R., Gurumurthy, S., and Abraham, J. ACCE: Automatic correction of control-flow errors. In Test Conference, 2007. ITC 2007. IEEE International (oct. 2007), pp. 1--10.
[20]
Venkatasubramanian, R., Hayes, J., and Murray, B. Low-cost on-line fault detection using control flow assertions. In On-Line Testing Symposium, 2003. IOLTS 2003. 9th IEEE (july 2003), pp. 137--143.
[21]
Wilken, K., and Shen, J. P. Continuous Signature Monitoring: Efficient Concurrent-Detection of Processor Control Errors. In Proceedings of the 1988 International Conference on Test (Washington, DC, USA, 1988), ITC'88, IEEE Computer Society, pp. 914--925.
[22]
Wu, Y., Gu, G., Huang, S., and Ni, J. Control Flow Checking Algorithm using Soft-based Intra-/Inter-block Assigned-Signature. In Computer and Computational Sciences, 2007. IMSCCS 2007. Second International Multi-Symposiums on (Aug.), pp. 412--415.

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  1. Quantitative Analysis of Control Flow Checking Mechanisms for Soft Errors

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    cover image ACM Other conferences
    DAC '14: Proceedings of the 51st Annual Design Automation Conference
    June 2014
    1249 pages
    ISBN:9781450327305
    DOI:10.1145/2593069
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 01 June 2014

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    Cited By

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    • (2024)Generic Soft Error Data and Control Flow Error Detection by Instruction DuplicationIEEE Transactions on Dependable and Secure Computing10.1109/TDSC.2023.324584221:1(78-92)Online publication date: Jan-2024
    • (2023)gemV-tool: A Comprehensive Soft Error Reliability Estimation Tool for Design Space ExplorationElectronics10.3390/electronics1222457312:22(4573)Online publication date: 8-Nov-2023
    • (2022)Trace-and-brace (TAB): bespoke software countermeasures against soft errorsProceedings of the 23rd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems10.1145/3519941.3535070(73-85)Online publication date: 14-Jun-2022
    • (2022)Nonlinear Code-Based Low-Overhead Fine-Grained Control Flow CheckingIEEE Transactions on Computers10.1109/TC.2021.305713271:3(658-669)Online publication date: 1-Mar-2022
    • (2021)Revisiting Symptom-Based Fault Tolerant Techniques against Soft ErrorsElectronics10.3390/electronics1023302810:23(3028)Online publication date: 4-Dec-2021
    • (2021)An Ultra-Low-Cost Soft Error Protection Scheme Based on the Selection of Critical VariablesElectronics10.3390/electronics1017210110:17(2101)Online publication date: 30-Aug-2021
    • (2021)Investigating How Software Characteristics Impact the Effectiveness of Automated Software Fault ToleranceIEEE Transactions on Nuclear Science10.1109/TNS.2021.307325968:5(1014-1022)Online publication date: May-2021
    • (2020)Path Sensitive Signatures for Control Flow Error DetectionThe 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems10.1145/3372799.3394360(62-73)Online publication date: 16-Jun-2020
    • (2020)Applying Compiler-Automated Software Fault Tolerance to Multiple Processor PlatformsIEEE Transactions on Nuclear Science10.1109/TNS.2019.295997567:1(321-327)Online publication date: Jan-2020
    • (2020)Fine Grained Control Flow Checking with Dedicated FPGA Monitors2020 IEEE 33rd International System-on-Chip Conference (SOCC)10.1109/SOCC49529.2020.9524751(219-224)Online publication date: 8-Sep-2020
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