Error Management system with RAS characteristics of the ARMarchitecture

Abstract-Modern data centers need to keep servers running stably for a long time without affecting data integrity. Therefore, data center servers need a set of effective systematic design solutions to ensure the reliability, availability and maintainability of the server, known as the RAS feature. And CPUs based on ARM architecture only began to mandate the implementation to support CPU RAS features from ARMv8 architecture. We explore an arm-based RAS framework with the ability of mutli-dimensional error detection and mutli-level processing. As compares to predominantly RAS system for arm-based servers which usually treat errors by reading component status registers and simply isolate the component software, our approach is more robust and accurate on isolating RAS errors. In the server RAS system, the memory RAS feature is the most important aspect. Therefore, this paper proposed a set of high-end server memory RAS system architecture design scheme based on ARM processor. The architecture scheme takes software and hardware error events as the core processing object, and realizes the repair and isolation of errors step by step through the functional modular processing strategy of error detection, error reporting, error classification, error characterization and error processing. The memory RAS system architecture creates a set of perfect error management system for CPU, memory, linux virtual memory and other abnormal events, realizes the full time detection of the server system operation, and can immediately carry out targeted treatment when the error occurs, greatly reducing the serious consequences caused by the abnormal operation of the server.