2014 Proceeding- Conference Chairs:
- Daniel Gracia Pérez,
- Morteza Biglari Abhari,
- Daniel Chillet,
- Gianluca Palermo
It is our pleasure to bring you the proceedings for the fourth edition of the RAPIDO workshop, RAPIDO'14. For this fourth edition, RAPIDO'14 is collocated with the 9th Intl. Conference on High-Performance and Embedded Architectures and Compilers, HiPEAC 2014.
The focus of the RAPIDO'14 workshop is on methods and tools for rapid simulation and performance evaluation in embedded and high performance systems design. Given continuous advances in chip technology, it is to be expected that future-generation processors will integrate numerous units on a single die, including multiple processor cores, multiple levels of (shared/private) caches or memories, and multiple dedicated accelerators, which will be glued together through a network on-chip (NoC).
Proceeding Downloads
Using chip multithreading to speed up scenario-based design space exploration: a case study
Early design space exploration (DSE) is a key element of system-level design of complex embedded systems, helping designers to make design decisions during the early design phases. For early DSE, where the design space is vast, it is crucial that the ...
A framework for design space exploration and performance analysis of networked embedded systems
The design of the network in distributed embedded systems often necessitates the analysis of its HW/SW tradeoffs along with network tradeoffs. To do so, a framework is presented to perform joint exploration of both HW/SW and network (NW) design spaces. ...
FlexTiles: a globally homogeneous but locally heterogeneous manycore architecture
This paper introduces the FlexTiles platform, which consist of a manycore architecture associated with a complete tool flow. The different components of the manycore architecture are based on general purpose processors (GPP), low power DSP cores and an ...
Workload characteristics of DNA sequence analysis: from storage systems' perspective
The recent development of NGS (Next Generation Sequencing) methods has greatly increased the amount of genome data and created the need for high-performance computing and high-performance storage systems. The key issue in developing high-performance ...
System-level power estimation tool for embedded processor based platforms
- Santhosh Kumar Rethinagiri,
- Oscar Palomar,
- Rabie Ben Atitallah,
- Smail Niar,
- Osman Unsal,
- Adrian Cristal Kestelman
Due to the ever increasing constraints on power consumption in embedded systems, this paper addresses the need for an efficient power modeling and estimation methodology based tool at system-level. On the one hand, today's embedded industries focus more ...
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Acceptance Rates
| Year | Submitted | Accepted | Rate |
|---|---|---|---|
| RAPIDO '17 | 12 | 6 | 50% |
| RAPIDO '15 | 16 | 8 | 50% |
| Overall | 28 | 14 | 50% |