- General Chair:
- Chong-Min Kyung,
- Program Chairs:
- Kiyoung Choi,
- Soonhoi Ha
- Sponsor:
- sigda
It is our great pleasure and honor to welcome you to the 13th ASP-DAC, January 21 - 24, 2008 held in Seoul, Korea. Astounding growth of economy in Asia for the last quarter century is based on the zeal and quest for the development of industry and information technology. Ever-growing interactions among countries and among heterogeneous technologies are where the potential for unrelenting growth lies. This is happening in Asia, where the role of semiconductor and systems industry is truly critical.
ASP-DAC 2008 will encourage all participants from all parts of the planet earth to meet with each other and exploit the best opportunities in the future regarding information technology, embedded systems design and design automation technologies. We look forward to having precious time to share the active exchange of ideas and experiences through this conference.
ASP-DAC 2008 received 350 papers from 27 countries and selected 122 papers as a result of thorough review. ASP-DAC conference will be a stimulating and challenging conference through academic exchange of up-to-date ideas. We have one-day for tutorials comprising two full-day lectures and four half-day lectures, followed by technical sessions in three days including Special Sessions, Designers' Forum, Student Forum, and University LSI Design Contest. ASP-DAC 2008 will help you steer into the vision of 2008 and beyond with messages from three excellent keynote speeches, to be addressed by Professor Jan Rabaey, Univ. of California on Tuesday, Dr. Ki-Soo Hwang, CEO of Core Logic, top fabless in Korea on Wednesday, and Dr. F. C. Tseng, vice chairman of TSMC on Thursday.
Proceeding Downloads
Determination of optimal polynomial regression function to decompose on-die systematic and random variations
A procedure that decomposes measured parametric device variation into systematic and random components is studied by considering the decomposition process as selecting the most suitable model for describing on-die spatial variation trend. In order to ...
Within-die process variations: how accurately can they be statistically modeled?
Within-die process variations arise during integrated circuit (IC) fabrication in the sub-100nm regime. These variations are of paramount concern as they deviate the performance of ICs from their designers' original intent. These deviations reduce the ...
Chebyshev affine arithmetic based parametric yield prediction under limited descriptions of uncertainty
In modern circuit design, it is difficult to provide reliable parametric yield prediction since the real distribution of process data is hard to measure. Most existing approaches are not able to handle the uncertain distribution property coming from the ...
Distribution arithmetic for stochastical analysis
This paper presents a novel arithmetic which allows calculations with fluctuating values. The arithmetic consists of a special representation of random variables and procedures for performing numerical operations between them. Given the distributions of ...
Handling partial correlations in yield prediction
In nanometer regime, IC designs have to consider the impact of process variations, which is often indicated by manufacturing/parametric yield. This paper investigates a yield model - the probability that the values of multiple manufacturing/circuit ...
Recommendations
Acceptance Rates
| Year | Submitted | Accepted | Rate |
|---|---|---|---|
| ASPDAC '23 | 328 | 102 | 31% |
| ASPDAC '21 | 368 | 111 | 30% |
| ASP-DAC '08 | 350 | 122 | 35% |
| ASP-DAC '07 | 408 | 131 | 32% |
| Overall | 1,454 | 466 | 32% |