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- posterMay 2014
Built-in generation of functional broadside tests considering primary input constraints
GLSVLSI '14: Proceedings of the 24th edition of the great lakes symposium on VLSIPages 237–238https://doi.org/10.1145/2591513.2591560This paper describes a method for built-in generation of functional broadside tests for a circuit that is embedded in a larger design, taking functional constraints on its primary input sequences into account. The constraints are captured by functional ...
- research-articleJanuary 2013
Built-in generation of functional broadside tests using a fixed hardware structure
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (ITVL), Volume 21, Issue 1Pages 124–132https://doi.org/10.1109/TVLSI.2011.2179682Functional broadside tests are two-pattern scanbased tests that avoid overtesting by ensuring that a circuit traverses only reachable states during the functional clock cycles of a test. In addition, the power dissipation during the fast functional ...
- research-articleApril 2002
Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times
IEEE Transactions on Computers (ITCO), Volume 51, Issue 4Pages 409–419https://doi.org/10.1109/12.995451We describe an on-chip test generation scheme for synchronous sequential circuits that allows at-speed testing of such circuits. The proposed scheme is based on loading of (short) input sequences into an on-chip memory and expansion of these sequences ...
