IEEE Transactions on Computers

A class of communication networks which is suitable for "multiple processor systems" was studied by Pradhan and Reddy. The underlying graph (to be called Shift and Replace graph or SRG) is based on DeBruijn digraphs and is a function of two parameters r ...

A high-speed VLSI multiplication algorithm internally using redundant binary representation is proposed. In n bit binary integer multiplication, n partial products are first generated and then added up pairwise by means of a binary tree of redundant ...

A cryptographic scheme for controlling access to information within a group of users organized in a hierarchy was proposed in [1]. The scheme enables a user at some level to compute from his own cryptographic key the keys of the users below him in the ...

This paper presents several new properties of D sequences that have applications to encryption and error coding. It also considers the problem of joint encryption and error-correction coding and proposes a solution using D sequences. The encryption ...

This paper specifies procedures for defining a monitor circuit that can detect faults in microprogram sequencers. The monitor and the sequencer operate in parallel and errors are detected by comparing outputs from the monitor circuit with outputs from ...

We have designed and built the Orrery, a special computer for high-speed high-precision orbital mechanics computations. On the problems the Orrery was designed to solve, it achieves approximately 10 Mflops in about 1 ft3 of space while consuming 150 W ...

An evaluation stack, used exclusively to store temporary values in expression evaluation, is known to be an effective mechanism in the implementation of high level languages. This work considers the efficient management of evaluation stacks for ...

A systolic binary tree machine which can handle all the dictionary machine and priority queue operations such as Insert, Delete, Extract-Min, Extract-Max, Member, and Near is designed in this paper. The operations can be fed into the tree machine in a ...

We consider networks of processors where each processor either has one in-link and one out-link, or two in-links and two out-links. We study three properties of such networks: 1) diameter, 2) connectivity, and 3) the ring property. We propose a class of ...

This note provides a design of a binary comparator with completion signal. The average propagation delay is a constant, independent of n, the number of inputs, while the logic complexity is a linear function of n.

We give necessary and sufficient conditions in order that the infinite product or sum of the terms of a positive decreasing sequence generates the reals in a given interval.

A constrained regularization program for inverting linear algebraic and integral equations (CONTIN) [l]-[3] has been implemented on an MC68000 based desktop computer supplemented with floating point accelerator hardware. Implementation of CONTIN on a ...

Videotex is a system which provides users with low-cost real-time access to information. In such a system, user requests are forwarded to a service computer where the desired information is retrieved and sent back to the user. In this study, we ...

When there is no division circuit available, the arithmetical function of division is normally performed by a library subroutine. The library subroutine normally allows both the divisor and the dividend to be variables, and requires the execution of ...

The problem of diagnostic test scheduling (DTS) is to assign to each edge e of a diagnostic graph G a time interval of length l(e) so that intervals corresponding to edges at any given vertex do not overlap and the overall finishing time is minimum. In ...