Fast and Flexible Elliptic Curve Point Arithmetic over Prime Fields
We present an innovative methodology for accelerating the elliptic curve point formulae over prime fields. This flexible technique uses the substitution of multiplication with squaring and other cheaper operations, by exploiting the fact that field ...
Low-Transition Test Pattern Generation for BIST-Based Applications
A low transition test pattern generator, called LT-LFSR, is proposed to reduce the average and peak power of a circuit during test by reducing the transitions among patterns. Transitions are reduced in two dimensions; 1) between consecutive patterns (...
A Selective Trigger Scan Architecture for VLSI Testing
Time, power, and data volume are among some of the most challenging issues for testing System-on-Chip (SoC) and have not been fully resolved even if a scan-based technique is employed. A novel architecture referred to the Selective Trigger Scan ...
An Energy-Delay Tunable Task Allocation Strategy for Collaborative Applications in Networked Embedded Systems
Collaborative applications with energy and low-delay constraints are emerging in various networked embedded systems like wireless sensor networks and multimedia terminals. Conventional energy-aware task allocation schemes developed for collaborative ...
Sharp Thresholds for Scheduling Recurring Tasks with Distance Constraints
The problem of identifying suitable conditions for the schedulability of (non-preemptive) recurring tasks with deadlines is of great importance to real-time systems. In this article, motivated by the problem of scheduling radar dwells, we show that ...
eRAID: Conserving Energy in Conventional Disk-Based RAID System
Recently energy consumption becomes an ever critical concern for both low-end and high-end storage servers and data centers. A majority of existing energy conservation solutions resort to multispeed disks. However, most of current server systems are ...
An Efficient Data-Distribution Mechanism in a Processor-In-Memory (PIM) Architecture Applied to Motion Estimation
In general, the main purpose for using PIM modules is to dramatically increase the Data-Level Parallelism (DLP) and avoid the limited issue rate of current systems (even when they include SIMD extensions) caused by the limited data bandwidth and ...
An Instruction Throughput Model of Superscalar Processors
Advances in semiconductor technology enable larger processor design space, leading to increasingly complex systems. Designers must evaluate many architecture design points to achieve the optimal design. Currently, most architecture exploration is ...
A Low-Latency Pipelined 2D and 3D CORDIC Processors
The unfolded and pipelined CORDIC is a high performance hardware element that produces a wide variety of one and two argument functions with high throughput. The reduction in delay, power, and area (cost) are of significant interest regarding this ...
Interval-Based Timing Constraints Their Satisfactions and Applications
In real systems, an error range ( Δ) is often given to a time stamp (t) for an observed event. Such practice implicitly states that the event happens anytime in the interval [t-Δ1, t+Δ2]. Hence, constraints based on intervals are more realistic. However,...
