The ΣΔ-BIST Method Applied to Analog Filters
This paper describes the ΣΔ-BIST method, defined as an analog BIST circuit in the context of mixed signal systems. The test procedure is based on the reuse of existing analog circuits configured as sigma-delta modulators in the analog domain. The test ...
Innovative Built-In Self-Test Schemes for On-Chip Diagnosis, Compliant with the IEEE 1149.4 Mixed-Signal Test Bus Standard
This paper presents a testing scheme for analog and mixed-signal circuitry compatible with the IEEE 1149.4 mixed-signal test bus standard. A high-speed dynamic current sensor is described, as well as an innovative self-diagnostic method called VDDQ. The ...
Topological Considerations for the Diagnosability Conditions of Analogue Circuits Using a Pair of Conjugate Trees
The idea of using topological conditions in the analysis of nonlinear circuits has attracted the attention of researchers in recent years. This paper introduces a method that foccusses on the problem of analogue circuit diagnosis. The method determines ...
Multiple Scan Chain Design for Two-Pattern Testing
Non-standard fault models often require the application of two-pattern testing. A fully-automated approach for generating a multiple scan chain-based architecture is presented so that two-pattern test sets generated for the combinational core can be ...
A Unified DFT Approach for BIST and External Test
This paper presents a partial reset technique for testability improvement of non-scan sequential circuits. Both pseudo-random BIST and deterministic External Test are in the scope of this paper. The partial reset technique is used to improve hard-to-...
A New On-Line Robust Approach to Design Noise-Immune Speech Recognition Systems
Hereafter, we present a new approach dealing to cope with the harmful effects of noise on speech recognition systems (SRS). This approach is oriented to hardware redundancy and it is essentially a modification of the classic Recovery Blocks scheme. When ...
Design Error Diagnosis with Re-Synthesis in Combinational Circuits
A new approach is proposed for removing design errors from digital circuits, which does not use any error model. Based on a diagnostic pre-analysis of the circuit, a subcircuit suspected to be erroneous is extracted. Opposite to other known works, re-...
Assessing the Soft Error Rate of Digital Architectures Devoted to Operate in Radiation Environment: A Case Studied
The effects of transient bit flips on the operation of processor based architectures is investigated through fault injection experiments performed in the hardware itself by means of the interruption mechanism. Such an approach is based on the execution, ...
