Applying Artificial Neural Networks to Logic Built-in Self-test: Improving Test Point Insertion
This study applies artificial neural networks (ANNs) to increase stuck-at and delay fault coverage of logic built-in self-test (LBIST) through test point insertion (TPI). Increasing TPI quality is essential for modern logic circuits, but the ...
CMOS Implementation and Performance Analysis of Known Approximate 4:2 Compressors
Approximate computing is one of the emerging concepts in multimedia applications like image processing applications. In the research world, it is getting more attention from researchers. Because of sacrificing a smaller scale in the accuracy of ...
Efficient Design of Rounding Based Static Segment Imprecise Multipliers for Error Tolerance Application
Error-Tolerant applications regularly accomplish more data adaption. Approximate computing is one of the optimum strategies for data manipulation in several Error-Tolerant applications. It depletes circuit complexity and enhances area, power, and ...
Automated Design Error Debugging of Digital VLSI Circuits
As the complexity and scope of VLSI designs continue to grow, fault detection processes in the pre-silicon stage have become crucial to guaranteeing reliability in IC design. Most fault detection algorithms can be solved by transforming them into ...
Novel Fault-Tolerant Processing in Memory Cell in Ternary Quantum-Dot Cellular Automata
Processing-in-memory (PIM) is a computational architecture in which the processing unit and memory are integrated into a single unit. Different technologies and methods can be used to implement PIM, but a more optimal design for PIM can be ...
Experimental and Simulation Results of Wien Bridge Oscillator Circuıt Realized wıth Op-Amp Designed Using a Memristor
In this study, a new op-amp model was created by re-designing the internal structure of the traditional operational amplifier (741 family) circuit element with a linear dopant drift TiO2 memristor (LDDTM) emulator model. The optimized working ...
Temperature and Humidity Controlled Test Bench for Temperature Sensor Characterization
- Syed Usman Amin,
- Muhammad Aaquib Shahbaz,
- Syed Arsalan Jawed,
- Fahd Khan,
- Muhammad Junaid,
- Danish Kaleem,
- Musaddiq Siddiq,
- Zain Warsi,
- Naveed
A temperature and humidity-controlled test bench for a wirelessly-powered ultra-low-power temperature sensor IC is presented. It consists of a closed metallic structure of 0.02 m3, forming a faraday-cage around the design under test (DUT), ...
