An automated consistency management approach for a privacy-aware electric vehicle architecture
Modern vehicles contain a number of highly connected embedded systems that generate, store, and process information and exchange it with their environment. Since a large part of this information is privacy-critical, privacy laws such as the GDPR ...
Design of a low-area hardware architecture to predict early signs of sudden cardiac arrests
Sudden cardiac arrest (SCA) results in an unexpected and untimely death within minutes, and its early prediction can alert cardiac patients to a timely medical diagnosis. To detect early symptoms of an SCA, the detection and classification of ...
Formal timing analysis of gate-level digital circuits using model checking
Due to the continuous reduction in the transistors sizing ruled by the Moore’s law, digital devices have become smaller, and more complex resulting in an enormous rise in the delay variations. Therefore, there is a dire need of precise and ...
Full wireless goniometer design with activity recognition for upper and lower limb
- Wearable full wireless goniometer was designed for upper and lower limb.
- The designed system has activity recognition.
- The designed system can measure in real-time and show joints’ movements in a 3D model simultaneously.
- The ...
People must move using their lower and upper extremities to complete their work. Depending on these extremities' using frequency or different effects such as age, genetics, and body weight, the extremities' ability may decrease. The joints' range ...
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PyIgH : A unified architecture of IgH EtherCAT Master based on Python considering hard real-time constraints
The increasing demand for rapid application development tools, especially those employing high-level languages such as Python, has underscored the importance of utilizing a wide array of popular libraries while addressing real-time constraints in ...
Highlights
- A Python-based EtherCAT master for distributed hard real-time control systems.
- Configuration and control of EtherCAT devices within the Python runtime environment.
- Comprehensive performance analysis compared with conventional and ...
Count overflow and privilege mode filtering extension implementation on a RISC-V on-board processor
- Andrea Fernández Gallego,
- Miguel Jiménez Arribas,
- Iván Gamino del Río,
- Agustín Martínez Hellín,
- Manuel Prieto Mateo,
- Óscar Rodríguez Polo,
- Antonio da Silva,
- Pablo Parra,
- Sebastián Sánchez
RISC-V is a computer architecture that has recently attracted considerable attention due to its advantageous qualities: it is an open instruction set, based on reduced and simple instructions. For this reason it has become an appealing choice ...
Mixture-of-Rookies: Saving DNN computations by predicting ReLU outputs
Deep Neural Networks (DNNs) are widely used in many application domains. However, they require a vast amount of computations and memory accesses to deliver outstanding accuracy. In this paper, we propose a scheme to predict whether the output of ...
Optimized k-Nearest neighbors search implementation on resource-constrained FPGA platforms
- KNN hardware accelerator unit designed to optimize resource utilization.
- Optimize sequential over parallel computations.
- Parallelisation using multiple optimized sequential distance computation units.
- FPGA implementation of kNN ...
The k-Nearest Neighbors (kNN) algorithm is a fundamental machine learning classification technique with wide-ranging applications. Among various kNN implementation choices, FPGA-based heterogeneous systems have gained popularity due to FPGA's ...
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