Memory arbiter synthesis and verification for a radar memory interface card
The target system of this paper is a radar memory interface card described in the IST AMETIST project. We present a way to synthesise and verify a memory arbiter for the interface card by specifying two different problems of logic model checking. In the ...
Programming languages capturing complexity classes
We investigate an imperative and a functional programming language. The computational power of fragments of these languages induce two hierarchies of complexity classes. Our first main theorem says that these hierarchies match, level by level, a ...
A compositional trace logic for behavioural interface specifications
We describe a compositional trace logic for behavioural interface specifications and corresponding proof rules for compositional reasoning. The trace logic is defined in terms of axioms in higher-order logic. This trace logic is applicable to any object-...
Transfinite corecursion
This paper presents theorems which enable to define transfinite semantics for programming languages easily. We call these theorems "corecursion theorems" because they state the existence of a function satisfying certain conditions analogous to the usual ...
Refining UML interactions with underspecification and nondeterminism
STAIRS is an approach to the compositional development of UML interactions, such as sequence diagrams and interaction overview diagrams. An important aspect of STAIRS is the ability to distinguish between underspecification and inherent nondeterminism ...
Language embeddings that preserve staging and safety
We study embeddings of programming languages into one another that preserve what reductions take place at compile-time, i.e., staging. A certain condition -- what we call a 'Turing complete kernel' -- is sufficient for a language to be stage-universal ...