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The memory gap and the future of high performance memories
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Multiprocessor enhancements of the SimpleScalar tool set

This paper describes multiprocessor enhancements of the SimpleScalar tool set. The core simulation code has been modified to support multiprocessing, and a run-time library has been introduced for thread creation and synchronization. Measurements using ...

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A modified architecture for high-density MRAM

This paper modifies the magnetic RAM (MRAM) architecture by removing a current rectifier per cell without sacrificing performance. A read operation of stored data is maintained by introducing a simple concept of"virtual ground" of operational amplifier. ...

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Emerging opportunities for binary tools

In recent years, binary instrumentation and optimization tools have been used effectively to understand and improve performance of significant programs. However, new opportunities are emerging in the distributed computing model of the Internet that has ...

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A dynamic binary translation approach to architectural simulation

We present the design of a PowerPC-based simulation infrastructure for architectural research. Our infrastructure uses an execution-driven out-of-order processor timing simulator from the SimpleScalar tool set. While porting SimpleScalar to the PowerPC ...

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Instruction translation for an experimental S/390 processor

The IBM™ S/390™ architecture is a complex architecture, which has grown over a long period of time. Typical implementations use microcode to cope with the more complex instructions and facilities of S/390. Current IBM S/390 processors even ...

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JiTI: a robust just in time instrumentation technique

In this paper, we describe JiTI, a novel technique for instrumenting program binaries. The technique correctly deals with programs that contain traditionally hard to instrument features such as data in code, code in data, and self-modifying code. The ...

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Optimising hot paths in a dynamic binary translator

In dynamic binary translation, code is translated "on the fly" at run-time, while the user perceives ordinary execution of the program on the target machine. Code fragments that are frequently executed follow the same sequence of flow control over a ...

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Optimization and precise exceptions in dynamic compilation

Maintaining precise exceptions is an important aspect of achieving full compatibility with a legacy architecture. While asynchronous exceptions can be deferred to an appropriate boundary in the code, synchronous exceptions must be taken when they occur. ...

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Internet Nuggets

This column consists of selected traffic from the comp.arch newsgroup, a forum for discussion of computer architecture on Internet--- an international computer network.

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