IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Compared with conventional analog circuit topology synthesis methods, the deep-reinforcement-learning (DRL)-based method features much higher synthesis efficiency while possessing the merit of strong generalization capability. However, this method cannot ...

Approximate computing is an emerging paradigm for error-tolerant applications. By introducing a reasonable amount of inaccuracy, both the area and delay of a circuit can be reduced significantly. To produce approximate circuits automatically, many ...

Edge training of deep neural networks (DNNs) is a desirable goal for continuous learning; however, it is hindered by the enormous computational power required by training. Hardware approximate multipliers have shown their effectiveness in gaining resource ...

The ever-growing data scale and computation complexity raise tremendous concerns about computer systems’ efficiency (i.e., lower hardware overhead and power consumption). Orthogonal to the advancement in semiconductor manufacturing technologies, ...

Printed electronics (PEs) promises on-demand fabrication, low nonrecurring engineering costs, and subcent fabrication costs. It also allows for high customization that would be infeasible in silicon, and bespoke architectures prevail to improve the ...

Due to deeply intertwined physical and hardware/software components together with an increasing number of interconnected heterogeneous devices powered by artificial intelligence (AI) techniques, the design complexity of cyber–physical systems (CPSs)...

As a specific kind of cyber–physical systems (CPSs), autonomous robot clusters play an important role in various intelligent manufacturing fields. However, due to the increasing design complexity of robot clusters, it is becoming more and more ...

Logic locking is a well-known solution that thwarts design intellectual property (IP) piracy and prevents illegal overproduction of integrated circuits (ICs) against adversaries in the globalized supply chain. The widespread prevalence of reverse-...

The functional correctness of compiler optimization does not ensure the security properties of the source program. A functionally correct compiler optimization may introduce new security vulnerabilities in the optimized program. In a compiler, ensuring ...

In recent years, to prevent computer systems from software attacks, hardware monitors are proposed as a type of efficient security enforcement scheme, which can detect software attacks at runtime. However, due to the limited flexibility of dedicated ...

Numerous security vulnerability assessment techniques urge precise and fast finite state machines (FSMs) extraction from the design under evaluation. Sequential logic locking, watermark insertion, fault-injection assessment of a system-on-a-chip (SoC) ...

The Boolean satisfiability (SAT) attack is an oracle-guided attack that can break most combinational logic locking schemes by efficiently pruning out all the wrong keys from the search space. Extending such an attack to sequential logic locking requires ...

With the rapid increase in the development of deep learning methodologies, deep neural networks (DNNs) are now being commonly deployed in smart systems (e.g., autonomous vehicles) and high-end security applications (e.g., face recognition, biometric ...

Multitenant field-programmable gate arrays (FPGAs) are increasingly being used in cloud computing technologies. Users are able to access the FPGA fabric remotely to implement custom accelerators in the cloud. However, the sharing of FPGA resources by ...

We propose a precise and efficient pipeline analysis to tackle the problem of out-of-order resources in modern embedded microprocessors for the computation of the worst-case execution time (WCET). Such resources are prone to timing anomalies (Reineke et ...

We present Ulgen, a runtime assurance (RTA) framework for programming safe cyber–physical systems (CPSs). In Ulgen, a system is implemented as a collection of asynchronous processes executing RTA modules which are generalizations of the well-known ...

Automatic design space exploration (DSE) is key in hardware-software (HW/SW) co-design. To cope with the large design space, explorations are often heuristic-based and/or approximate yielding potentially locally optimal solutions. Without knowing the ...

Distributed real-time systems (DRTSs) composed of many embedded end-systems have been widely adopted in the industrial fields. Time-sensitive networking (TSN), as a promising communication infrastructure for DRTS, has shown great potential in industry and ...

Real-time systems require locking protocols to coordinate access to shared resources. With the booming revolution of parallel processing technology in real-time systems, there has been some work addressing the problem of extending classic locking ...

We consider partitioned scheduling of an imprecise mixed-criticality (IMC) taskset on a uniform multiprocessor platform, with the earliest deadline first-virtual deadline (EDF-VD) as the uniprocessor task scheduling algorithm, and address the optimization ...

IoT devices usually work under power-constrained scenarios like outdoor environmental monitoring. Considering the cost and sustainability, in the long run, energy-harvesting technology is preferable for powering IoT devices. Since harvesting power is ...

In-memory computing (IMC) aims at solving the performance gap between CPU and memories introduced by the memory wall. However, general-purpose IMC does not consider the optimization of data transfers for patterns, such as stencils and convolutions. This ...

As a less developed but potential quantum technology, neutral atoms (NAs) can provide advantages, including higher qubit connectivity, longer-range interactions, and much more native multicontrol gates than superconductivity. Long-range interactions, ...

Stochastic computing has shown great promise for a variety of applications, including image processing circuits, due to its design simplicity, and low power consumption. This work proposes a hardware efficient and low-latency implementation of the ...

The peak power consumption has become an important concern in the hardware design process of some of today’s applications, such as energy harvesting (EH) and bio-implantable (BI) electronic devices. The limited peak harvested power in EH devices ...

Emerging persistent memory (PM) has the potential to substitute DRAM due to its near-DRAM performance and durability similar to disks. However, hash tables designed for DRAM cannot be directly adopted for PM. Moreover, prior studies on hash tables using ...

Spiking neural networks (SNNs) are an active research domain toward energy-efficient machine intelligence. Compared to conventional artificial neural networks (ANNs), SNNs use temporal spike data and bio-plausible neuronal activation functions such as ...

The data explosion of Internet of Things (IoT) and machine learning tasks raises a great demand on highly efficient computing hardware and paradigms. Brain-inspired hyperdimensional computing (HDC) is becoming a promising computing paradigm, which encodes ...

Due to high static power and low scalability, the traditional SRAM-based cache is not a good solution for image processing applications. Emerging spin transfer torque magnetic RAM (STT-MRAM) is a promising candidate for cache due to its low leakage power ...

With the rise of data-intensive applications, traditional computing paradigms have hit the memory-wall. In-memory computing using emerging nonvolatile memory (NVM) technology is a promising solution strategy to overcome the limitations of the von-Neumann ...