IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

The future of computing requires heterogeneous integration, including the recent adoption of chiplet methodology, where high-speed cross-chip interconnects and packaging are critical for the overall system performance. As an example of advanced packaging, ...

Since the last century, the exponential growth of the semiconductor industry has led to the creation of tiny and complex integrated circuits, e.g., sensors, actuators, and smart power. Innovative techniques are needed to ensure the correct functionality ...

We present a methodology for scalable exploration of cyber-physical system architectures. We propose a mathematical formulation of the architecture exploration problem as an optimized mapping problem that includes joint selection of system topologies and ...

With the development of the automotive industry toward intelligence and automation, there is a trend of controller area network (CAN) migrating to CAN with flexible data-rate (CAN-FD), where frame packing (i.e., packing signals of various periods, ...

The globalized nature of the integrated circuits supply chain has given rise to several security problems. The insertion of malicious components, called hardware Trojans, is one such serious problem. Since Trojans are activated only under extremely rare ...

The physical unclonable function (PUF) is a hardware security primitive that is used to generate secret keys or identity authentication for chips using random manufacturing process variation (MPV). The PUF based on ring oscillator (RO PUF) has been ...

Winternitz one-time signature (WOTS) is a quantum-resistant signature mechanism that has been widely used in direct acyclic graph (DAG)-based blockchain systems. However, it needs to generate a unique private/public key pair for each transaction, which ...

Among the physical layer baseband algorithms in macro base stations, the matrix processing has the dominant computing cost, large data access overhead, and complicated addressing mode. The existing data access methods are not the best solution for memory ...

Solid-state drives (SSDs) are widely used in cloud storage. As the capacity of an SSD has been increasing, it has become common for many virtual machines (VMs) to share a single SSD to maximize resource utilization. However, this sharing can degrade the ...

The first ACM/IEEE TinyML Design Contest (TDC) held at the 41st International Conference on Computer-Aided Design (ICCAD) in 2022 is a challenging, multimonth, research and development competition. TDC’22 focuses on real-world medical problems that ...

Convolutional neural networks (CNNs) have been gaining popularity in recent years, and researchers have designed specialized architectures to speed up the inference process. However, despite the promising potential of processing near-/in- sensor ...

This report presents a design space analysis for the phase transition material (PTM)-augmented magnetic random-access memories (MRAMs) with separate read–write paths. PTM is augmented in parallel with the magnetic tunnel junction (MTJ), improving ...

Ubiquitous in quantum computing is the step to encode data into a quantum state. This process is called quantum state preparation, and its complexity for nonstructured data is exponential on the number of qubits. Several works address this problem, for ...

The widespread deployment of sensors interconnected by wireless links and the management and exploitation of the data collected have given rise to the Internet of Things (IoT) concept. In this article, we undertake the design and implementation of a ...

ReRAM-based computing is good at accelerating convolutional neural network (CNN) inference due to its high computing parallelism, but its rigid crossbar structure may become less efficient in the face of the random data sparsity abundant in CNNs. In this ...

The novel computing-in-memory (CIM) technology has demonstrated significant potential in enhancing the performance and efficiency of convolutional neural networks (CNNs). However, due to the low precision of memory devices and data interfaces, an ...

Power is a great concern in integrated circuits (ICs) design flow, especially in portable devices. As an early stage in electronic design automation (EDA), logic synthesis can significantly affect the quality of the design. It is essential to optimize ...

Low-level hardware faults manifested in a Deep learning (DL) accelerator usher in graceless degradation of high-level classification accuracy, which can eventuate to catastrophic circumstances. This violates the crucial Functional Safety (FuSa) of the DL ...

Top-K sparsification-based compression techniques are popular and powerful for reducing communication costs in federated learning (FL). However, existing Top-K sparsification-based compression methods suffer from two critical issues that severely hinder ...

Interpolation is used to approximate the timing parameters of logic cells not specified in timing tables. Bilinear interpolation has been taken for granted in the industry, but the error increases as the nonlinearity of the timing parameters increases. In ...

Remarkable breakthroughs but daunting complexities of deep learning have aroused widespread interest in dedicated deep neural network (DNN) acceleration hardware, among which optical accelerators (OAs) are particularly promising thanks to their ...

To meet the demand in a wide range of practical applications, precision-scalable deep neural network (DNN) accelerators are becoming an unavoidable trend. On the other hand, it has been demonstrated that a DNN accelerator may achieve better computation ...

Fully programmable valve array (FPVA) biochips have emerged as a promising alternative for traditional application-specific microfluidic platforms thanks to their advantages in terms of flexibility and reconfigurability. By regularly deploying microvalves ...

Assurance cases are used to communicate and assess confidence in critical system properties, e.g., safety and security. Historically, assurance cases have been manually created documents, validated by engineers through lengthy and error-prone processes. ...

In 3-D NAND flash memory, the channel is always offset due to the complicated interference from the program/erase (PE), including the data retention and layer interference, so that the channel estimation is desired. However, due to the physical structure ...

Quantum computers based on spin qubits and superconducting qubits require radio-frequency (RF) electronic circuits to control and read out the state. As the scale of the quantum processors increases, the inaccuracy in the RF circuit becomes an ...

In this article, we introduce a model to calculate the threshold voltage of the victim transistor attacked by the neighbor transistors with a macaroni structure. Using this model, we investigate the shift of the victim threshold voltage to get insight ...

Model order reduction (MOR) has long been a mainstream strategy to accelerate large scale transient circuit simulation. Exponential integrator (EI) based on Krylov subspace approximation methods, on the other hand, are more recently developed for a ...

Mask optimization is a vital step in the VLSI manufacturing process in advanced technology nodes. As one of the most representative techniques, optical proximity correction (OPC) is widely applied to enhance printability. Since conventional OPC methods ...

The placement and routing steps directly impact the circuit performance, area, power consumption, and reliability. To handle the high complexity of modern circuits, these steps are tackled separately by applying a divide-and-conquer approach. ...