Modulo Reduction in Residue Number Systems
Residue number systems provide a good means for extremely long integer arithmetic. Their carry-free operations make parallel implementations feasible. Some applications involving very long integers, such as public key encryption, rely heavily on fast ...
Performance and Scalability of Preconditioned Conjugate Gradient Methods on Parallel Computers
This paper analyzes the performance and scalability of an iteration of the preconditioned conjugate gradient algorithm on parallel architectures with a variety of interconnection networks, such as the mesh, the hypercube, and that of the CM-5 * parallel ...
The Potential of Compile-Time Analysis to Adapt the Cache Coherence Enforcement Strategy to the Data Sharing Characteristics
Cache coherence schemes that dynamically adapt to memory referencing patterns have been proposed to improve coherence enforcement in shared-memory multiprocessors. By using only run-time information, however, these existing schemes are incapable of ...
A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks
Our goal is to reconcile the conflicting demands of performance and fault-tolerance in interprocessor communication. To this end, we propose a pipelined communication mechanism pipelined circuit-switching (PCS) which is a variant of the well known ...
Optimal Reconfiguration Algorithms for Real-Time Fault-Tolerant Processor Arrays
In this paper we consider the problem of reconfiguring processor arrays subject to computational loads that alternate between two modes. A strict mode is characterized by a heavy computational load and severe constraints on response time while a relaxed ...
Resource Placement with Multiple Adjacency Constraints in k-ary n-Cubes
The problem of placing resources in a $k$-ary $n$-cube $(k\,{\char'076}\,2)$ is considered in this paper. For a given $j \geq 1,$ resources are placed such that each nonresource node is adjacent to $j$ resource nodes. We first prove that perfect $j$-...
A Memory Interference Model for Regularly Patterned Multiple Stream Vector Accesses
Most existing analytical models for memory interference generally assume random bank selection for each memory access. In vector computers, however, memory accesses are typically regularly patterned with a number of data items being accessed ...
A Well-Behaved Enumeration of Star Graphs
An enumeration of star graphs is given which has many useful properties. For example an arbitrary prefix or suffix is connected; indeed the diameter is $O(n)$. As a consequence, there is an $O(n)$ interval broadcast algorithm. Prefixes which have $t(n-1)...
Prevention of Congestion in Packet-Switched Multistage Interconnection Networks
This paper proposes a simple, yet effective scheme to prevent congestion in a packet-switched multistage interconnection network (MIN) caused by hot spots. In this scheme, switches in the second and third stages of the MIN monitor their buffer occupancy ...
Properties of Generalized Branch and Combine Clock Networks
In a recent development a new clock distribution scheme has been introduced. The scheme called Branch-and-Combine or BaC, is the first to guarantee constant skew bound regardless of network size. In this paper we generalize and extend the work on BaC ...
Checkpoint Space Reclamation for Uncoordinated Checkpointing in Message-Passing Systems.
Uncoordinated checkpointing allows process autonomy and general nondeterministic execution, but suffers from potential domino effects and the associated space overhead. Previous to this research, checkpoint space reclamation had been based on the notion ...
Designing Efficient Parallel Algorithms on CRAP
A cross-bridge reconfigurable array of processors is a parallel processing system which has the ability to change dynamically the supported interconnection scheme during the execution of an algorithm. Based on this architecture, several $O(1)$ time ...
