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- ArticleJune 1999
- articleAugust 1988
Measurement and evaluation of the MIPS architecture and processor
ACM Transactions on Computer Systems (TOCS), Volume 6, Issue 3Pages 229–257https://doi.org/10.1145/45059.45060MIPS is a 32-bit processor architecture that has been implemented as an nMOS VLSI chip. The instruction set architecture is RISC-based. Close coupling with compilers and efficient use of the instruction set by compiled programs were goals of the ...
- ArticleJune 1985
SWAMI: a flexible logic implementation system
A new system for logic synthesis and VLSI layout, the Stanford Weinberger Array Minimizer and Implementor (SWAMI), has been developed. This paper describes the system's algorithms and presents preliminary results. The minimization of logic expressions ...