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- research-articleJanuary 2012
A universal parallel front-end for execution driven microarchitecture simulation
RAPIDO '12: Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and ToolsJanuary 2012, Pages 25–32https://doi.org/10.1145/2162131.2162135Execution driven microarchitecture simulators tend to devote a large portion of their source code to a front-end that performs instruction set level functional simulation, providing the decoded instruction stream to a back-end that performs timing ...
- research-articleJanuary 2012
Heterogeneous integration to simplify many-core architecture simulations
RAPIDO '12: Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and ToolsJanuary 2012, Pages 17–24https://doi.org/10.1145/2162131.2162134The EU Apple-CORE project has explored the design and implementation of novel general-purpose many-core chips featuring hardware microthreading and hardware support for concurrency management. The introduction of the latter in the cores ISA has required ...
- research-articleJanuary 2012
SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation
RAPIDO '12: Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and ToolsJanuary 2012, Pages 9–16https://doi.org/10.1145/2162131.2162133Due to the increasing complexity of new multiprocessor systems on chip, flexible and accurate simulators become a necessity for exploring the vast design space solution. In a streaming execution model, only a well-balanced pipeline can lead to an ...