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- tutorialJune 2017
Plasticine: A Reconfigurable Architecture For Parallel Paterns
- Raghu Prabhakar,
- Yaqi Zhang,
- David Koeplinger,
- Matt Feldman,
- Tian Zhao,
- Stefan Hadjis,
- Ardavan Pedram,
- Christos Kozyrakis,
- Kunle Olukotun
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 2May 2017, Pages 389–402https://doi.org/10.1145/3140659.3080256Reconfigurable architectures have gained popularity in recent years as they allow the design of energy-efficient accelerators. Fine-grain fabrics (e.g. FPGAs) have traditionally suffered from performance and power inefficiencies due to bit-level ...
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ISCA '17: Proceedings of the 44th Annual International Symposium on Computer Architecture: ISBN 9781450348928, June 2017 - tutorialJune 2017
ShortCut: Architectural Support for Fast Object Access in Scripting Languages
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 2May 2017, Pages 494–506https://doi.org/10.1145/3140659.3080237The same flexibility that makes dynamic scripting languages appealing to programmers is also the primary cause of their low performance. To access objects of potentially different types, the compiler creates a dispatcher with a series of if statements, ...
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ISCA '17: Proceedings of the 44th Annual International Symposium on Computer Architecture: ISBN 9781450348928, June 2017 - tutorialJune 2017
Language-level persistency
- Aasheesh Kolli,
- Vaibhav Gogte,
- Ali Saidi,
- Stephan Diestelhorst,
- Peter M. Chen,
- Satish Narayanasamy,
- Thomas F. Wenisch
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 2May 2017, Pages 481–493https://doi.org/10.1145/3140659.3080229The commercial release of byte-addressable persistent memories, such as Intel/Micron 3D XPoint memory, is imminent. Ongoing research has sought mechanisms to allow programmers to implement recoverable data structures in these new main memories. Ensuring ...
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ISCA '17: Proceedings of the 44th Annual International Symposium on Computer Architecture: ISBN 9781450348928, June 2017 - research-articleApril 2017
Sound Loop Superoptimization for Google Native Client
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 313–326https://doi.org/10.1145/3093337.3037754Software fault isolation (SFI) is an important technique for the construction of secure operating systems, web browsers, and other extensible software. We demonstrate that superoptimization can dramatically improve the performance of Google Native ...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 -
- research-articleApril 2017
What Scalable Programs Need from Transactional Memory
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 105–118https://doi.org/10.1145/3093337.3037750Transactional memory (TM) has been the focus of numerous studies, and it is supported in processors such as the IBM Blue Gene/Q and Intel Haswell. Many studies have used the STAMP benchmark suite to evaluate their designs. However, the speedups obtained ...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 - research-articleApril 2017
Breaking the Boundaries in Heterogeneous-ISA Datacenters
- Antonio Barbalace,
- Robert Lyerly,
- Christopher Jelesnianski,
- Anthony Carno,
- Ho-Ren Chuang,
- Vincent Legout,
- Binoy Ravindran
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 645–659https://doi.org/10.1145/3093337.3037738Energy efficiency is one of the most important design considerations in running modern datacenters. Datacenter operating systems rely on software techniques such as execution migration to achieve energy efficiency across pools of machines. Execution ...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 - research-articleApril 2017
An Architecture Supporting Formal and Compositional Binary Analysis
- Joseph McMahan,
- Michael Christensen,
- Lawton Nichols,
- Jared Roesch,
- Sung-Yee Guo,
- Ben Hardekopf,
- Timothy Sherwood
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 177–191https://doi.org/10.1145/3093337.3037733Building a trustworthy life-critical embedded system requires deep reasoning about the potential effects that sequences of machine instructions can have on full system operation. Rather than trying to analyze complete binaries and the countless ways ...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 - research-articleApril 2017
Typed Architectures: Architectural Support for Lightweight Scripting
- Channoh Kim,
- Jaehyeok Kim,
- Sungmin Kim,
- Dooyoung Kim,
- Namho Kim,
- Gitae Na,
- Young H. Oh,
- Hyeon Gyu Cho,
- Jae W. Lee
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 77–90https://doi.org/10.1145/3093337.3037726Dynamic scripting languages are becoming more and more widely adopted not only for fast prototyping but also for developing production-grade applications. They provide high-productivity programming environments featuring high levels of abstraction with ...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 - research-articleApril 2017Best Paper
Black-box Concurrent Data Structures for NUMA Architectures
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 207–221https://doi.org/10.1145/3093337.3037721High-performance servers are Non-Uniform Memory Access (NUMA) machines. To fully leverage these machines, programmers need efficient concurrent data structures that are aware of the NUMA performance artifacts. We propose Node Replication (NR), a black-...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 - research-articleApril 2017
Locality Transformations for Nested Recursive Iteration Spaces
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 281–295https://doi.org/10.1145/3093337.3037720There has been a significant amount of effort invested in designing scheduling transformations such as loop tiling and loop fusion that rearrange the execution of dynamic instances of loop nests to place operations that access the same data close ...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 - research-articleApril 2017
Locality-Aware CTA Clustering for Modern GPUs
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 297–311https://doi.org/10.1145/3093337.3037709Cache is designed to exploit locality; however, the role of on-chip L1 data caches on modern GPUs is often awkward. The locality among global memory requests from different SMs (Streaming Multiprocessors) is predominantly harvested by the commonly-...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 - research-articleApril 2017
ProRace: Practical Data Race Detection for Production Use
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 45, Issue 1March 2017, Pages 149–162https://doi.org/10.1145/3093337.3037708This paper presents ProRace, a dynamic data race detector practical for production runs. It is lightweight, but still offers high race detection capability. To track memory accesses, ProRace leverages instruction sampling using the performance ...
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ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450344654, April 2017 - research-articleJune 2016
Decoupling loads for nano-instruction set computers
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 44, Issue 3June 2016, Pages 406–417https://doi.org/10.1145/3007787.3001181We propose an ISA extension that decouples the data access and register write operations in a load instruction. We describe system and hardware support for decoupled loads. Furthermore, we show how compilers can generate better static instruction ...
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ISCA '16: Proceedings of the 43rd International Symposium on Computer Architecture: ISBN 9781467389471, June 2016 - extended-abstractMarch 2016
Synopsis of the ASPLOS '16 Wild and Crazy Ideas (WACI) Invited-Speakers Session
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 44, Issue 2May 2016, Pages 291–294https://doi.org/10.1145/2980024.2876512The Wild and Crazy Ideas (WACI) session is a longstanding tradition at ASPLOS, soliciting talks that consist of forward-looking, visionary, inspiring, creative, far out or just plain amazing ideas presented in an exciting way. (Amusing elements in the ...
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ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915, March 2016 - extended-abstractMarch 2016
Programmer Productivity in a World of Mushy Interfaces: Challenges of the Post-ISA Reality
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 44, Issue 2May 2016, Page 591https://doi.org/10.1145/2980024.2876511Since 1964, we had the notion that the instruction set architecture (ISA) is a useful and fairly opaque abstraction layer between hardware and software. Software rode hardware's performance wave while remaining gloriously oblivious to hardware's growing ...
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ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915, March 2016 - research-articleMarch 2016
Generating Configurable Hardware from Parallel Patterns
- Raghu Prabhakar,
- David Koeplinger,
- Kevin J. Brown,
- HyoukJoong Lee,
- Christopher De Sa,
- Christos Kozyrakis,
- Kunle Olukotun
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 44, Issue 2May 2016, Pages 651–665https://doi.org/10.1145/2980024.2872415In recent years the computing landscape has seen an increasing shift towards specialized accelerators. Field programmable gate arrays (FPGAs) are particularly promising for the implementation of these accelerators, as they offer significant performance ...
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ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915, March 2016 - research-articleMarch 2016
Cogent: Verifying High-Assurance File System Implementations
- Sidney Amani,
- Alex Hixon,
- Zilin Chen,
- Christine Rizkallah,
- Peter Chubb,
- Liam O'Connor,
- Joel Beeren,
- Yutaka Nagashima,
- Japheth Lim,
- Thomas Sewell,
- Joseph Tuong,
- Gabriele Keller,
- Toby Murray,
- Gerwin Klein,
- Gernot Heiser
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 44, Issue 2May 2016, Pages 175–188https://doi.org/10.1145/2980024.2872404We present an approach to writing and formally verifying high-assurance file-system code in a restricted language called Cogent, supported by a certifying compiler that produces C code, high-level specification of Cogent, and translation correctness ...
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ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915, March 2016 - research-articleMarch 2016
LDX: Causality Inference by Lightweight Dual Execution
- Yonghwi Kwon,
- Dohyeong Kim,
- William Nick Sumner,
- Kyungtae Kim,
- Brendan Saltaformaggio,
- Xiangyu Zhang,
- Dongyan Xu
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 44, Issue 2May 2016, Pages 503–515https://doi.org/10.1145/2980024.2872395Causality inference, such as dynamic taint anslysis, has many applications (e.g., information leak detection). It determines whether an event e is causally dependent on a preceding event c during execution. We develop a new causality inference engine ...
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ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915, March 2016 - research-articleMarch 2016
RAPID Programming of Pattern-Recognition Processors
ACM SIGARCH Computer Architecture News (SIGARCH), Volume 44, Issue 2May 2016, Pages 593–605https://doi.org/10.1145/2980024.2872393We present RAPID, a high-level programming language and combined imperative and declarative model for programming pattern-recognition processors, such as Micron's Automata Processor (AP). The AP is a novel, non-Von Neumann architecture for direct ...
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ASPLOS '16: Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems: ISBN 9781450340915, March 2016