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FinFET-based SRAM design

Published: 08 August 2005 Publication History

Abstract

Intrinsic variations and challenging leakage control in today's bulk-Si MOSFETs limit the scaling of SRAM. Design tradeoffs in six-transistor (6-T) and four-transistor (4-T) SRAM cells are presented in this work. It is found that 6-T and 4-T FinFET-based SRAM cells designed with built-in feedback achieve significant improvements in the cell static noise margin (SNM) without area penalty. Up to 2x improvement in SNM can be achieved in 6-T FinFET-based SRAM cells. A 4-T FinFET-based SRAM cell with built-in feedback can achieve sub-100pA per-cell standby current and offer the similar improvements in SNM as the 6-T cell with feedback, making them attractive for low-power, low-voltage applications

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Cited By

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  • (2023)Improved Stability for Robust and Low-Power SRAM Cell Using FinFET TechnologyJournal of Circuits, Systems and Computers10.1142/S021812662450106833:06Online publication date: 28-Oct-2023
  • (2023)Design and Characterization of 6T SRAM bitcell using 18nm FinFET2023 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)10.1109/DISCOVER58830.2023.10316718(89-95)Online publication date: 13-Oct-2023
  • (2022)FinFET: A Revolution in Nanometer RegimeEmerging Electronics and Automation10.1007/978-981-19-4300-3_35(403-417)Online publication date: 10-Nov-2022
  • Show More Cited By

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cover image ACM Conferences
ISLPED '05: Proceedings of the 2005 international symposium on Low power electronics and design
August 2005
400 pages
ISBN:1595931376
DOI:10.1145/1077603
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 08 August 2005

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Author Tags

  1. SRAM
  2. double gate transistors
  3. low power
  4. memory

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Cited By

View all
  • (2023)Improved Stability for Robust and Low-Power SRAM Cell Using FinFET TechnologyJournal of Circuits, Systems and Computers10.1142/S021812662450106833:06Online publication date: 28-Oct-2023
  • (2023)Design and Characterization of 6T SRAM bitcell using 18nm FinFET2023 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)10.1109/DISCOVER58830.2023.10316718(89-95)Online publication date: 13-Oct-2023
  • (2022)FinFET: A Revolution in Nanometer RegimeEmerging Electronics and Automation10.1007/978-981-19-4300-3_35(403-417)Online publication date: 10-Nov-2022
  • (2021)Recent Advances in Negative Capacitance FinFETs for Low-Power Applications: A ReviewIEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control10.1109/TUFFC.2021.309561668:10(3056-3068)Online publication date: Oct-2021
  • (2021)Optimisation of SRAM cell in 7-nm node by response surface methodInternational Journal of Electronics10.1080/00207217.2021.1966674109:8(1307-1323)Online publication date: 5-Sep-2021
  • (2021)Lanthanum Doped Zirconium Oxide (LaZrO2) High-k Gate Dielectric FinFET SRAM Cell OptimizationTransactions on Electrical and Electronic Materials10.1007/s42341-021-00296-2Online publication date: 13-Mar-2021
  • (2021)On the logic performance of bulk junctionless FinFETsAnalog Integrated Circuits and Signal Processing10.1007/s10470-020-01782-yOnline publication date: 2-Jan-2021
  • (2020) Simulation and performance analysis of 15 Nm FinFET based carry skip adder Computational Intelligence10.1111/coin.1241737:2(799-818)Online publication date: 8-Dec-2020
  • (2020)Investigation of Electrical Characteristic Behavior Induced by Channel-Release Process in Stacked Nanosheet Gate-All-Around MOSFETsIEEE Transactions on Electron Devices10.1109/TED.2020.298941667:6(2648-2652)Online publication date: Jun-2020
  • (2020)Effective Low Leakage 6T and 8T FinFET SRAMs: Using Cells With Reverse-Biased FinFETs, Near-Threshold Operation, and Power GatingIEEE Transactions on Circuits and Systems II: Express Briefs10.1109/TCSII.2019.292292167:4(765-769)Online publication date: Apr-2020
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