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Post-compilation optimization for multiple gains with pattern matching

Authors:

P. P. ChakrabartiAuthors Info & Claims

ACM SIGPLAN Notices, Volume 40, Issue 12

Pages 14 - 23

https://doi.org/10.1145/1117303.1117306

Published: 01 December 2005 Publication History

Abstract

Many existing retargetable compilers for ASIPs and domain-specific processors generate low quality code since the compiler is not able to fully utilize the intricacies of ISA of these processors. Hence, there is a need to further optimize the code produced by these compilers. In this paper, we introduce a new post-compilation optimization technique which is based on finding repeating instruction patterns in generated code and replacing them with their optimized equivalents. The instruction patterns to be found are represented by finite state machines which allow encapsulation of multiple patterns in just one representation, and instructions in a pattern to be not necessarily lexically adjacent. We also present a conflict resolution algorithm to select an optimization whenever a set of instructions fall under two or more different patterns of which only one can be applied on the basis of code size, cycle count or switching activity improvement. We tested this technique on the compiled binaries of ARM and Intel processors for code size improvement. We discuss the possible applications of this strategy in design space exploration (DSE) of embedded processors.

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Cited By

Hałas PKołodyńska DPłaza AGęca MHubicki Z(2017)Modified fly ash and zeolites as an effective adsorbent for metal ions from aqueous solutionAdsorption Science & Technology10.1177/026361741770042035:5-6(519-533)Online publication date: 11-Apr-2017
https://doi.org/10.1177/0263617417700420
Lopes BEcco LXavier EAzevedo R(2016)Design and evaluation of compact ISA extensionsMicroprocessors & Microsystems10.1016/j.micpro.2015.09.01040:C(1-15)Online publication date: 1-Feb-2016
https://dl.acm.org/doi/10.1016/j.micpro.2015.09.010
Paroczi Z(2013)x86 instruction reordering for code compressionActa Cybernetica10.14232/actacyb.21.1.2013.1321:1(177-190)Online publication date: 1-Jan-2013
https://dl.acm.org/doi/10.14232/actacyb.21.1.2013.13
Show More Cited By

Index Terms

Post-compilation optimization for multiple gains with pattern matching
1. Software and its engineering
  1. Software notations and tools
    1. Compilers
      1. Runtime environments

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cover image ACM SIGPLAN Notices

ACM SIGPLAN Notices Volume 40, Issue 12

December 2005

32 pages

ISSN:0362-1340

EISSN:1558-1160

DOI:10.1145/1117303

Issue’s Table of Contents

Copyright © 2005 Authors.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 December 2005

Published in SIGPLAN Volume 40, Issue 12

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Cited By

Hałas PKołodyńska DPłaza AGęca MHubicki Z(2017)Modified fly ash and zeolites as an effective adsorbent for metal ions from aqueous solutionAdsorption Science & Technology10.1177/026361741770042035:5-6(519-533)Online publication date: 11-Apr-2017
https://doi.org/10.1177/0263617417700420
Lopes BEcco LXavier EAzevedo R(2016)Design and evaluation of compact ISA extensionsMicroprocessors & Microsystems10.1016/j.micpro.2015.09.01040:C(1-15)Online publication date: 1-Feb-2016
https://dl.acm.org/doi/10.1016/j.micpro.2015.09.010
Paroczi Z(2013)x86 instruction reordering for code compressionActa Cybernetica10.14232/actacyb.21.1.2013.1321:1(177-190)Online publication date: 1-Jan-2013
https://dl.acm.org/doi/10.14232/actacyb.21.1.2013.13
Songchao Liu Huailiang Tan Lei Huang (2012)An embedded cross-assembler optimization method2012 International Conference on Computer Science and Information Processing (CSIP)10.1109/CSIP.2012.6308935(641-644)Online publication date: Aug-2012
https://doi.org/10.1109/CSIP.2012.6308935
Hundt RRaman EThuresson MVachharajani N(2011)MAO -- An extensible micro-architectural optimizerProceedings of the 9th Annual IEEE/ACM International Symposium on Code Generation and Optimization10.5555/2190025.2190077(1-10)Online publication date: 2-Apr-2011
https://dl.acm.org/doi/10.5555/2190025.2190077
Hundt RRaman EThuresson MVachharajani N(2011)MAO — An extensible micro-architectural optimizerInternational Symposium on Code Generation and Optimization (CGO 2011)10.1109/CGO.2011.5764669(1-10)Online publication date: Apr-2011
https://doi.org/10.1109/CGO.2011.5764669
Cheng MSlagter KLung TChung Y(2010)A VLIW-based post compilation framework for multimedia embedded DSPs with hardware specific optimizationsProceedings of the Second Russia-Taiwan conference on Methods and tools of parallel programming multicomputers10.5555/1927517.1927525(51-58)Online publication date: 16-May-2010
https://dl.acm.org/doi/10.5555/1927517.1927525
Cheng MSlagter KLung TChung Y(2010)A VLIW-Based Post Compilation Framework for Multimedia Embedded DSPs with Hardware Specific OptimizationsMethods and Tools of Parallel Programming Multicomputers10.1007/978-3-642-14822-4_6(51-58)Online publication date: 2010
https://doi.org/10.1007/978-3-642-14822-4_6

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