Article

A practical approach for monitoring analog circuits

Authors:

Mohamed H. Zaki,

Sofiène Tahar,

Guy BoisAuthors Info & Claims

GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI

Pages 330 - 335

https://doi.org/10.1145/1127908.1127984

Published: 30 April 2006 Publication History

Abstract

Formal methods have been advocated for the verification of digital design where correctness is proved mathematically. In contrast to digital designs, the verification of analog and mixed signal systems is a challenging task that requires lots of expertise and deep understanding of their behavior. In this paper, we present a run-time verification methodology based on monitoring the behavior (solution flow) of analog circuits. Monitors are deterministic timed automata that can be synthesized from temporal properties. For illustration purposes, we applied our methodology on the verification of the oscillation property of a tunnel diode oscillator.

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Cited By

Ahmadyan SKumar JVasudevan SMacii E(2013)Runtime verification of nonlinear analog circuits using incremental time-augmented RRT algorithmProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485296(21-26)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485296
Pierre L(2012)A formal framework for testing with assertion checkers in mixed-signal simulation2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)10.1109/ICECS.2012.6463745(284-287)Online publication date: Dec-2012
https://doi.org/10.1109/ICECS.2012.6463745
Greenstreet MYang SNarayanan VYan ZMacii EBhanja S(2008)Verifying start-up conditions for a ring oscillatorProceedings of the 18th ACM Great Lakes symposium on VLSI10.1145/1366110.1366160(201-206)Online publication date: 4-May-2008
https://dl.acm.org/doi/10.1145/1366110.1366160
Show More Cited By

Index Terms

A practical approach for monitoring analog circuits
1. Hardware
  1. Hardware validation
    1. Functional verification

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Published In

cover image ACM Conferences

GLSVLSI '06: Proceedings of the 16th ACM Great Lakes symposium on VLSI

April 2006

450 pages

ISBN:1595933476

DOI:10.1145/1127908

General Chairs:
Gang Qu
University of Maryland, College Park
,
Yehea Ismail
Northwestern University
,
Program Chairs:
Vijaykrishnan Narayanan
Pennsylvania State University
,
Hai Zhou
Northwestern University

Copyright © 2006 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 30 April 2006

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April 30 - May 1, 2006

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

Ahmadyan SKumar JVasudevan SMacii E(2013)Runtime verification of nonlinear analog circuits using incremental time-augmented RRT algorithmProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485296(21-26)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485296
Pierre L(2012)A formal framework for testing with assertion checkers in mixed-signal simulation2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)10.1109/ICECS.2012.6463745(284-287)Online publication date: Dec-2012
https://doi.org/10.1109/ICECS.2012.6463745
Greenstreet MYang SNarayanan VYan ZMacii EBhanja S(2008)Verifying start-up conditions for a ring oscillatorProceedings of the 18th ACM Great Lakes symposium on VLSI10.1145/1366110.1366160(201-206)Online publication date: 4-May-2008
https://dl.acm.org/doi/10.1145/1366110.1366160
Zaki MTahar SBois G(2008)ReviewMicroelectronics Journal10.1016/j.mejo.2008.05.01339:12(1395-1404)Online publication date: 1-Dec-2008
https://dl.acm.org/doi/10.1016/j.mejo.2008.05.013
Zhi Jie Dong Zaki MAl Sammane GTahar SBois G(2007)Run-time verification using the VHDL-AMS simulation environment2007 IEEE Northeast Workshop on Circuits and Systems10.1109/NEWCAS.2007.4488030(1513-1516)Online publication date: Aug-2007
https://doi.org/10.1109/NEWCAS.2007.4488030
Zhi Jie Dong Zaki MAl Sammane GTahar SBois G(2007)Checking properties of PLL designs using run-time verification2007 Internatonal Conference on Microelectronics10.1109/ICM.2007.4497676(125-128)Online publication date: Dec-2007
https://doi.org/10.1109/ICM.2007.4497676

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