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Modeling and measurement of the impact of Input/Output on system performance

Authors:

Janaki Akella,

Daniel P. SiewiorekAuthors Info & Claims

ISCA '91: Proceedings of the 18th annual international symposium on Computer architecture

Pages 390 - 399

https://doi.org/10.1145/115952.115991

Published: 01 April 1991 Publication History

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Cited By

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Kim JMun JIm GJeong GChoe G(2002)A Study on Buffer and Shared Memory Optimization for Multi-Processor SystemThe KIPS Transactions:PartA10.3745/KIPSTA.2002.9A.2.1479A:2(147-162)Online publication date: 1-Jun-2002
https://doi.org/10.3745/KIPSTA.2002.9A.2.147
Jain RSomalwar KWerth JBrowne J(1997)Heuristics for Scheduling I/O OperationsIEEE Transactions on Parallel and Distributed Systems10.1109/71.5840968:3(310-320)Online publication date: 1-Mar-1997
https://dl.acm.org/doi/10.1109/71.584096
Lee CParng T(1996)A Subsystem-Oriented Performance Analysis Methodology for Shared-Bus MultiprocessorsIEEE Transactions on Parallel and Distributed Systems10.1109/71.5082547:7(755-767)Online publication date: 1-Jul-1996
https://dl.acm.org/doi/10.1109/71.508254
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Modeling and measurement of the impact of Input/Output on system performance

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Special Issue: Proceedings of the 18th annual international symposium on Computer architecture (ISCA '91)

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Published In

ISCA '91: Proceedings of the 18th annual international symposium on Computer architecture

April 1991

399 pages

ISBN:0897913949

DOI:10.1145/115952

Chairman:
Zvonko Vranesic

ACM SIGARCH Computer Architecture News Volume 19, Issue 3
Special Issue: Proceedings of the 18th annual international symposium on Computer architecture (ISCA '91)
May 1991
375 pages
ISSN:0163-5964
DOI:10.1145/115953
Editor:
Zvonko Vranesic
Univ. of Toronto, Toronto, Canada
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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 April 1991

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ISCA91

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SIGARCH
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ISCA91: 18th International Symposium on Computer Architecture

May 27 - 30, 1991

Ontario, Toronto, Canada

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Overall Acceptance Rate 543 of 3,203 submissions, 17%

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Cited By

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Kim JMun JIm GJeong GChoe G(2002)A Study on Buffer and Shared Memory Optimization for Multi-Processor SystemThe KIPS Transactions:PartA10.3745/KIPSTA.2002.9A.2.1479A:2(147-162)Online publication date: 1-Jun-2002
https://doi.org/10.3745/KIPSTA.2002.9A.2.147
Jain RSomalwar KWerth JBrowne J(1997)Heuristics for Scheduling I/O OperationsIEEE Transactions on Parallel and Distributed Systems10.1109/71.5840968:3(310-320)Online publication date: 1-Mar-1997
https://dl.acm.org/doi/10.1109/71.584096
Lee CParng T(1996)A Subsystem-Oriented Performance Analysis Methodology for Shared-Bus MultiprocessorsIEEE Transactions on Parallel and Distributed Systems10.1109/71.5082547:7(755-767)Online publication date: 1-Jul-1996
https://dl.acm.org/doi/10.1109/71.508254
Narasimha Reddy A(1992)A study of I/O system organizationsACM SIGARCH Computer Architecture News10.1145/146628.14038720:2(308-317)Online publication date: 1-Apr-1992
https://dl.acm.org/doi/10.1145/146628.140387
Narasimha Reddy AGottlieb A(1992)A study of I/O system organizationsProceedings of the 19th annual international symposium on Computer architecture10.1145/139669.140387(308-317)Online publication date: 19-May-1992
https://dl.acm.org/doi/10.1145/139669.140387
Lee CHsieh SParng TLee JTsai C(1995)Performance analysis of a separate address/data bus multiprocessor systemJournal of the Chinese Institute of Engineers10.1080/02533839.1995.967771918:4(553-563)Online publication date: Jun-1995
https://doi.org/10.1080/02533839.1995.9677719
Johnson Baylor SBenveniste CBoelhouwer L(1994)A methodology for evaluating parallel I/O performance for massively parallel processors27th Annual Simulation Symposium10.1109/SIMSYM.1994.283115(31-40)Online publication date: 1994
https://doi.org/10.1109/SIMSYM.1994.283115

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Modeling and measurement of the impact of Input/Output on system performance