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A retargetable instruction reorganizer

Author:

Jack W. DavidsonAuthors Info & Claims

SIGPLAN '86: Proceedings of the 1986 SIGPLAN symposium on Compiler construction

Pages 234 - 241

https://doi.org/10.1145/12276.13334

Published: 01 July 1986 Publication History

Abstract

Extant peephole optimizers can perform many optimizations that are handled by higher-level optimizers. This paper describes a retargetable instruction reorganizer that performs targeting and evaluation order determination by applying a well known algorithm for optimal code generation for expressions to object code. By applying the algorithm to object code after code generation and optimization, a phase ordering problem often encountered by higher-level optimizers is avoided. It minimizes the number of registers and temporaries required to compile expressions by rearranging machine instructions. For some machines, this can result in smaller and faster programs. By generalizing its operation, the reorganizer can also be used to reorder instructions to avoid delays in pipelined machines. For one pipelined machine, it has provided a 5 to 10 percent improvement in the execution speed of benchmark programs.

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Cited By

Goodman JHsu W(2014)Code scheduling and register allocation in large basic blocksACM International Conference on Supercomputing 25th Anniversary Volume10.1145/2591635.2667158(88-98)Online publication date: 10-Jun-2014
https://dl.acm.org/doi/10.1145/2591635.2667158
Franz M(2005)Adaptive compression of syntax trees and iterative dynamic code optimization: Two basic technologies for mobile object systemsMobile Object Systems Towards the Programmable Internet10.1007/3-540-62852-5_19(263-276)Online publication date: 7-Jun-2005
https://doi.org/10.1007/3-540-62852-5_19
Harcourt EMauney JCook T(2005)From processor timing specifications to static instruction schedulingStatic Analysis10.1007/3-540-58485-4_36(116-130)Online publication date: 8-Jun-2005
https://doi.org/10.1007/3-540-58485-4_36
Show More Cited By

Index Terms

A retargetable instruction reorganizer
1. Hardware
  1. Communication hardware, interfaces and storage
    1. Signal processing systems
2. Software and its engineering
  1. Software notations and tools
    1. Compilers
      1. Source code generation

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Information

Published In

cover image ACM Conferences

SIGPLAN '86: Proceedings of the 1986 SIGPLAN symposium on Compiler construction

July 1986

275 pages

ISBN:0897911970

DOI:10.1145/12276

Editor:
Richard L Wexelblat
Philips Laboratories, Briarcliff Manor, NY

ACM SIGPLAN Notices Volume 21, Issue 7
July 1986
275 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/13310
Editor:
Richard L. Wexelblat
Philips Laboratories, Briarcliff Manor, NY
Issue’s Table of Contents

Copyright © 1986 Author.

Sponsors

SIGPLAN: ACM Special Interest Group on Programming Languages

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 July 1986

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SCC86

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SIGPLAN

SCC86: SIGPLAN Symposium on Compiler Construction

June 25 - 27, 1986

California, Palo Alto, USA

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Citations

Cited By

Goodman JHsu W(2014)Code scheduling and register allocation in large basic blocksACM International Conference on Supercomputing 25th Anniversary Volume10.1145/2591635.2667158(88-98)Online publication date: 10-Jun-2014
https://dl.acm.org/doi/10.1145/2591635.2667158
Franz M(2005)Adaptive compression of syntax trees and iterative dynamic code optimization: Two basic technologies for mobile object systemsMobile Object Systems Towards the Programmable Internet10.1007/3-540-62852-5_19(263-276)Online publication date: 7-Jun-2005
https://doi.org/10.1007/3-540-62852-5_19
Harcourt EMauney JCook T(2005)From processor timing specifications to static instruction schedulingStatic Analysis10.1007/3-540-58485-4_36(116-130)Online publication date: 8-Jun-2005
https://doi.org/10.1007/3-540-58485-4_36
Benitez MDavidson J(2005)The advantages of machine-dependent global optimizationProgramming Languages and System Architectures10.1007/3-540-57840-4_27(105-124)Online publication date: 31-May-2005
https://doi.org/10.1007/3-540-57840-4_27
Griesemer R(2005)Scheduling instructions by direct placementCompiler Construction10.1007/3-540-55984-1_21(229-235)Online publication date: 1-Jun-2005
https://doi.org/10.1007/3-540-55984-1_21
Harmon MBaker TWhalley D(1994)A retargetable technique for predicting execution time of code segmentsReal-Time Systems10.1007/BF010888037:2(159-182)Online publication date: 1-Sep-1994
https://dl.acm.org/doi/10.1007/BF01088803
Boyd MWhalley D(1993)Isolation and analysis of optimization errorsACM SIGPLAN Notices10.1145/173262.15509328:6(26-35)Online publication date: 1-Jun-1993
https://dl.acm.org/doi/10.1145/173262.155093
Boyd MWhalley D(1993)Isolation and analysis of optimization errorsProceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation10.1145/155090.155093(26-35)Online publication date: 1-Aug-1993
https://dl.acm.org/doi/10.1145/155090.155093
Harmon MBaker TWhalley D(1992)A retargetable technique for predicting execution time[1992] Proceedings Real-Time Systems Symposium10.1109/REAL.1992.242675(68-77)Online publication date: 1992
https://doi.org/10.1109/REAL.1992.242675
Davidson JWhalley D(1990)Ease: an environment for architecture study and experimentationACM SIGMETRICS Performance Evaluation Review10.1145/98460.9877518:1(259-260)Online publication date: 1-Apr-1990
https://dl.acm.org/doi/10.1145/98460.98775
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