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View all- Goli MStoppe JDrechsler R(2020)Automated Nonintrusive Analysis of Electronic System Level DesignsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.288966539:2(492-505)Online publication date: Feb-2020
- Goli MStoppe JDrechsler R(2017)Automatic equivalence checking for SystemC-TLM 2.0 models against their formal specificationsProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130531(630-633)Online publication date: 27-Mar-2017
- Goli MStoppe JDrechsler R(2017)Automatic equivalence checking for SystemC-TLM 2.0 models against their formal specificationsDesign, Automation & Test in Europe Conference & Exhibition (DATE), 201710.23919/DATE.2017.7927064(630-633)Online publication date: Mar-2017
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