article

Evolutionary functional recovery in virtual reconfigurable circuits

Author:

Lukáš SekaninaAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 3, Issue 2

Pages 8 - es

https://doi.org/10.1145/1265949.1265954

Published: 01 July 2007 Publication History

Abstract

A virtual reconfigurable circuit (VRC) is a domain-specific reconfigurable device developed using an ordinary FPGA in order to easily implement evolvable hardware applications. While a fast partial runtime reconfiguration and application-specific programmable elements represent the main advantages of VRC, the main disadvantage of the VRC is the area consumed. This study describes experiments conducted to estimate how the use of VRC influences the dependability of FPGA-based evolvable systems. It is shown that these systems are not as sensitive to faults as their area-demanding implementations might suggest. An evolutionary algorithm is utilized to design fault tolerant circuits as well as to perform an automatic functional recovery when faults are detected in the configuration memory of the FPGA. All the experiments are performed on models of reconfigurable devices.

References

[1]

Alderighi, M., Candelori, A., Casini, F., D'Angelo, S., Mancini, M., Paccagnella, A., Pastore, S., and Sechi, G. R. 2005. Heavy ion effects on configuration logic of virtex FPGAs. In Proceedings of the 11th IEEE International OnLine Testing Symposium. Saint Raphael, France. IEEE Computer Society, 49--53.

Digital Library

[2]

Bernardi, P., Reorda, M. S., Sterpone, L., and Violante, M. 2004. On the evaluation of seu sensitiveness in sram-based FPGAs. In Proceedings of the 10th IEEE International OnLine Testing Symposium. Madeira Island, Portugal. IEEE Computer Society, 115--120.

Digital Library

[3]

Bradley, D., Ortega-Sanchez, C., and Tyrrell, A. M. 2000. Embryonics + immunotronics: A bio-inspired approach to fault tolerance. In Proceedings of the 2nd NASA/DoD Workshop on Evolvable Hardware. Palo, Alto, CA. IEEE Computer Society, 215--224.

Digital Library

[4]

Carmichael, C., Caffrey, M., and Salazar, A. 2000. Correcting single-event upsets through virtex partial configuration. Xilinx Application Note XAPP 216.

[5]

Garvie, M. and Thompson, A. 2003. Evolution of self-diagnosing hardware. In Proceedings of the 6th Conference on Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 2606. Springer-Verlag, Berlin, Germany, 238--248.

Digital Library

[6]

Glette, K. and Torresen, J. 2005. A flexible on-chip evolution system implemented on a Xilinx Virtex-ii pro device. In Proceedings of the 6th Conference on Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Springer-Verlag, Berlin, Germany, 66--75.

Digital Library

[7]

Gwaltney, D. and Dutton, K. 2005. A VHDL core for intrinsic evolution of discrete time filters with signal feedback. In Proceedings of the NASA/DoD Conference on Evolvable Hardware. Washington D.C. IEEE Computer Society, 43--50.

Digital Library

[8]

Hartmann, M. and Haddow, P. C. 2004. Evolution of fault-tolerant and noise-robust digital designs. IEE Proceedings---Computers and Digital Techniques 151, 4, 287--294.

[9]

Higuchi, T., Niwa, T., Tanaka, T., Iba, H., de Garis, H., and Furuya, T. 1993. Evolving hardware with genetic learning: A first step towards building a Darwin machine. In Proceedings of the 2nd International Conference on From Animals to Animats 2: Simulation of Adaptive Behavior. Honolulu, HA. MIT Press, 417--424.

Digital Library

[10]

Korenek, J. and Sekanina, L. 2005. Intrinsic evolution of sorting networks: A novel complete hardware implementation for FPGAs. In Proceedings of the 6th Conference on Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Springer-Verlag, Berlin, Germany, 46--55.

Digital Library

[11]

Koza, J. R., Bennett, F. H., Andre, D., and Keane, M. A. 1999. Genetic Programming III: Darwinian Invention and Problem Solving. Morgan Kaufmann, San Francisco, CA.

Digital Library

[12]

Lohn, J. D., Larchev, G. V., and DeMara, R. F. 2003. A genetic representation for evolutionary fault recovery in virtex FPGAs. In Proceedings of the 5th Conference on Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 2606. Springer-Verlag, Berlin, Germany, 47--56.

Digital Library

[13]

Mange, D., Sipper, M., Stauffer, A., and Tempesti, G. 2000. Towards robust integrated circuits: The embryonics approach. Proceedings of IEEE 88, 4, 516--541.

[14]

Martinek, T. and Sekanina, L. 2005. An evolvable image filter: Experimental evaluation of a complete hardware implementation in FPGA. In Proceedings of the 6th Conference on Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Springer-Verlag, Berlin, Germany, 76--85.

Digital Library

[15]

Masner, J., Cavalieri, J., Frenzel, J. F., and Foster, J. A. 2000. Size versus robustness in evolved sorting networks: Is bigger better&quest; In Proceedings of the 2nd NASA/DoD Workshop on Evolvable Hardware. Palo Alto, CA. IEEE Computer Society, 81--90.

Digital Library

[16]

Miller, J., Job, D., and Vassilev, V. 2000. Principles in the evolutionary design of digital circuits -- Part I. Genetic Programm. Evolv. Mach. 1, 1, 8--35.

Digital Library

[17]

Pradhan, D. 1996. Fault-Tolerant Computer System Design. Prentice Hall, Upper Saddle River, New Jersey.

Digital Library

[18]

qpro. 2001. Qpro Virtex 2.5v QML high-reliability FPGAs. Xilinx data sheet DS002.

[19]

Salomon, R., Widiger, H., and Tockhorn, A. 2006. Rapid evolution of time-efficient packet classifiers. In Proceedings of the 2006 IEEE Congress on Evolutionary Computation. Vancouver, Canada. IEEE CIS, 2793--2799.

[20]

Sekanina, L. 2003. Virtual reconfigurable circuits for real-world applications of evolvable hardware. In Proceedings of the 5th Conference on Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 2606. Springer-Verlag, Berlin, Germany, 186--197.

Digital Library

[21]

Sekanina, L. 2004. Evolvable components: From Theory to Hardware Implementations. Springer-Verlag, Berlin, Germany.

Digital Library

[22]

Sekanina, L. 2006. On dependability of FPGA-based evolvable hardware systems that utilize virtual reconfigurable circuits. In Proceedings of the Computing Frontiers Conference. ACM, 221--228.

Digital Library

[23]

Sekanina, L. and Friedl, S. 2004. An evolvable combinational unit for FPGAs. Comput. Informat. 23, 5, 461--486.

[24]

Sekanina, L., Martinek, T., and Gajda, Z. 2006. Extrinsic and intrinsic evolution of multifunctional combinational modules. In Proceedings of the IEEE Congress on Evolutionary Computation. Vancouver, Canada. IEEE CIS, 9676--9683.

[25]

Stoica, A., Keymeulen, D., Arslan, T., Duong, V., Zebulum, R. S., Ferguson, I., and Guo, X. 2004. Circuit self-recovery experiments in extreme environments. In Proceedings of the 2004 NASA/DoD Conference on Evolvable Hardware. Seattle, WA, IEEE Computer Society, 142--145.

[26]

Stoica, A., Keymeulen, D., and Zebulum, R. S. 2001. Evolvable hardware solutions for extreme temperature electronics. In Proceedings of the 3rd NASA/DoD Workshop on Evolvable Hardware. IEEE Computer Society, Long Beach, CA. 93--97.

Digital Library

[27]

Stoica, A., Keymeulen, D., Zebulum, R. S., Thakoor, A., Daud, T., Klimeck, G., Jin, Y., Tawel, R., and Duong, V. 2000. Evolution of analog circuits on field programmable transistor arrays. In Proceedings of the 2nd NASA/DoD Workshop on Evolvable Hardware. Palo Alto, CA. IEEE Computer Society, 99--108.

Digital Library

[28]

Thompson, A. 1998. Hardware Evolution: Automatic Design of Electronic Circuits in Reconfigurable Hardware by Artificial Evolution. Springer-Verlag, Berlin, Germany.

Digital Library

[29]

Tyrrell, A. M., Hollingworth, G., and Smith, S. 2001. Evolutionary strategies and intrinsic fault tolerance. In Proceedings of the 3rd NASA/DoD Workshop on Evolvable Hardware. Long Beach, CA. IEEE Computer Society, 98--106.

Digital Library

[30]

Tyrrell, A. M., Krohling, R., and Zhou, Y. 2004. A new evolutionary algorithm for the promotion of evolvable hardware. IEE Proceedings: Computers and Digital Techniques 151, 4, 267--275.

[31]

Vasicek, Z. and Sekanina, L. 2007. An evolvable hardware system in Xilinx Virtex II Pro FPGA. Int. J. Innov. Comput. Appli. 1, 1, 63--73.

Digital Library

[32]

Wirthlin, M. J., Johnson, E., Rollins, N., Caffrey, M., and Graham, P. 2003. The reliability of FPGA circuit designs in the presence of radiation induced configuration upsets. In Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines. Washington, D.C. IEEE Computer Society, 133--142.

Digital Library

[33]

Zebulum, R. S., Keymeulen, D., Duong, V., Guo, X., Ferguson, M. I., and Stoica, A. 2003. Experimental results in evolutionary fault-recovery for field programmable analog devices. In Proceedings of the 5th NASA/DoD Workshop on Evolvable Hardware. Chicago. IEEE Computer Society, 192--198.

Digital Library

[34]

Zebulum, R. S., Stoica, A., Keymeulen, D., Sekanina, L., Ramesham, R., and Guo, X. 2005. Evolvable hardware system at extreme low temperatures. In Proceedings of the 6th Conference on Evolvable Systems: From Biology to Hardware. Lecture Notes in Computer Science, vol. 3637. Springer-Verlag, Berlin, Germany, 37--45.

Digital Library

[35]

Zhang, Y., Smith, S., and Tyrrell, A. 2004. Intrinsic evolvable hardware in digital filter design. In Applications of Evolutionary Computing. Lecture Notes in Computer Science, vol. 3005. Springer-Verlag, Berlin, Germany, 389--398.

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Evolutionary functional recovery in virtual reconfigurable circuits
1. Hardware

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cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 3, Issue 2

July 2007

138 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/1265949

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Copyright © 2007 ACM.

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 July 2007

Published in JETC Volume 3, Issue 2

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Cited By

Deepanjali SShaik ANoor Mahammad SBeautlin S(2024)Evolvable Hardware for Fault Mitigation in Control Circuits2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)10.1109/VLSID60093.2024.00119(672-677)Online publication date: 6-Jan-2024
https://doi.org/10.1109/VLSID60093.2024.00119
Sakali RSk N(2024)Fault-tolerant multiplier using self-healing techniqueMicroelectronics Reliability10.1016/j.microrel.2024.115458160(115458)Online publication date: Sep-2024
https://doi.org/10.1016/j.microrel.2024.115458
Yao RLiang JQian SZhang XTian X(2023)Efficient design methodology for adaptive system based on direct bitstream evolutionIEICE Electronics Express10.1587/elex.20.2022051820:13(20220518-20220518)Online publication date: 10-Jul-2023
https://doi.org/10.1587/elex.20.20220518
Kumar Sakali RMahammad Shak N(2023)Intrinsic Based Self-healing Adder Design Using Chromosome Reconstruction AlgorithmJournal of Electronic Testing10.1007/s10836-023-06050-139:1(111-122)Online publication date: 29-Mar-2023
https://doi.org/10.1007/s10836-023-06050-1
Shang QChen LCui JLu Y(2020)Hardware Evolution Based on Improved Simulated Annealing Algorithm in Cyclone V FPSoCsIEEE Access10.1109/ACCESS.2020.29849508(64770-64782)Online publication date: 2020
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Shang QChen LWang DTong RPeng P(2019)Evolvable Hardware Design of Digital Circuits Based on Adaptive Genetic AlgorithmInternational Conference on Applications and Techniques in Cyber Intelligence ATCI 201910.1007/978-3-030-25128-4_97(791-800)Online publication date: 31-Jul-2019
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Almeida MPedrino E(2018)Hybrid Evolvable Hardware for automatic generation of image filtersIntegrated Computer-Aided Engineering10.3233/ICA-18056125:3(289-303)Online publication date: 17-May-2018
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Yang MHua GFeng YGong J(2017)Intelligent Fault‐Tolerance TechniquesFault‐Tolerance Techniques for Spacecraft Control Computers10.1002/9781119107392.ch8(261-336)Online publication date: 27-Jan-2017
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Lopez BValverde Jde la Torre ERiesgo T(2014)Power-aware multi-objective evolvable hardware system on an FPGA2014 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)10.1109/AHS.2014.6880159(61-68)Online publication date: Jul-2014
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