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Multiple defect diagnosis using no assumptions on failing pattern characteristics

Published: 08 June 2008 Publication History

Abstract

We propose an effective multiple defect diagnosis methodology that does not depend on failing pattern characteristics. The methodology consists of a conservative defect site identification and elimination algorithm, and an innovative path-based defect site elimination technique. The search space of the diagnosis method does not grow exponentially with the number of defects in the circuit under diagnosis. Simulation experiments show that this method can effectively diagnose circuits that are affected by 10 or more faults that include multiple stuck-at, bridge and transistor stuck-open faults.

References

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Cited By

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  • (2020)New Targets for Diagnostic Test GenerationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.292897139:10(3035-3043)Online publication date: Oct-2020
  • (2019)Test Scores for Improving the Accuracy of Logic Diagnosis for Multiple DefectsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2019.290083627:7(1720-1724)Online publication date: Jul-2019
  • (2017)DFM Evaluation Using IC Diagnosis DataIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.258728336:3(463-474)Online publication date: 1-Mar-2017
  • Show More Cited By

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      cover image ACM Conferences
      DAC '08: Proceedings of the 45th annual Design Automation Conference
      June 2008
      993 pages
      ISBN:9781605581156
      DOI:10.1145/1391469
      • General Chair:
      • Limor Fix
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 08 June 2008

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      Author Tags

      1. IC testing
      2. defect diagnosis
      3. fault isolation

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      Cited By

      View all
      • (2020)New Targets for Diagnostic Test GenerationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.292897139:10(3035-3043)Online publication date: Oct-2020
      • (2019)Test Scores for Improving the Accuracy of Logic Diagnosis for Multiple DefectsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2019.290083627:7(1720-1724)Online publication date: Jul-2019
      • (2017)DFM Evaluation Using IC Diagnosis DataIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.258728336:3(463-474)Online publication date: 1-Mar-2017
      • (2016)Improving the Accuracy of Defect Diagnosis with Multiple Sets of Candidate FaultsIEEE Transactions on Computers10.1109/TC.2015.246823465:7(2332-2338)Online publication date: 1-Jul-2016
      • (2016)Diagnosis of Multiple Stuck-at Faults Using Fault Element Graph with Reduced PowerSecurity in Computing and Communications10.1007/978-981-10-2738-3_36(414-426)Online publication date: 17-Sep-2016
      • (2014)Diagnose Failures Caused by Multiple Locations at a TimeIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2013.225643722:4(824-837)Online publication date: 1-Apr-2014
      • (2014)Design-for-Manufacturability Assessment for Integrated Circuits Using RADARIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2014.233621633:10(1559-1572)Online publication date: Oct-2014
      • (2014)OBOProceedings of the 2014 IEEE Computer Society Annual Symposium on VLSI10.1109/ISVLSI.2014.22(314-319)Online publication date: 9-Jul-2014
      • (2013)On candidate fault sets for fault diagnosis and dominance graphs of equivalence classesProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485551(1083-1088)Online publication date: 18-Mar-2013
      • (2013)Classes of difficult-to-diagnose transition fault clusters2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)10.1109/DFT.2013.6653574(1-6)Online publication date: Oct-2013
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