research-article

Sizing rules for bipolar analog circuit design

Authors:

Tobias Massier,

Helmut Graeb,

Ulf SchlichtmannAuthors Info & Claims

DATE '08: Proceedings of the conference on Design, automation and test in Europe

Pages 140 - 145

https://doi.org/10.1145/1403375.1403412

Published: 10 March 2008 Publication History

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Abstract

This paper presents sizing rules for basic building blocks in analog bipolar circuit design. Sizing rules efficiently capture design knowledge on the technology-specific level of transistor-pair groups. This reduces the effort for and improves the resulting quality of analog circuit synthesis. We present a hierarchical library of transistor-pair groups as basic building blocks for analog bipolar circuits. Sizing rules are constraints associated to these building blocks that must be satisfied to guarantee the function and robustness of each block. Results of applications like circuit sizing or design centering show that the use of sizing rules leads to improved and robust results.

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Li HJiao FDoboli AFanucci LTeich J(2016)Analog circuit topological feature extraction with unsupervised learning of new sub-structuresProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972160(1509-1512)Online publication date: 14-Mar-2016
https://dl.acm.org/doi/10.5555/2971808.2972160
Schlichtmann UDavoodi AYoung E(2015)Beyond GORDIAN and KraftwerkProceedings of the 2015 Symposium on International Symposium on Physical Design10.1145/2717764.2723571(133-140)Online publication date: 29-Mar-2015
https://dl.acm.org/doi/10.1145/2717764.2723571
Strasser MEick MGräb HSchlichtmann UJohannes FNassif SRoychowdhury J(2008)Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functionsProceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design10.5555/1509456.1509530(306-313)Online publication date: 10-Nov-2008
https://dl.acm.org/doi/10.5555/1509456.1509530

Index Terms

Sizing rules for bipolar analog circuit design
1. Hardware

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DATE '08: Proceedings of the conference on Design, automation and test in Europe

March 2008

1575 pages

ISBN:9783981080131

DOI:10.1145/1403375

General Chair:
Donatella Sciuto
Politecnico di Milano, Italy

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 10 March 2008

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The Russian Academy of Sciences

DATE '08: Design, Automation and Test in Europe

March 10 - 14, 2008

Munich, Germany

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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Li HJiao FDoboli AFanucci LTeich J(2016)Analog circuit topological feature extraction with unsupervised learning of new sub-structuresProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972160(1509-1512)Online publication date: 14-Mar-2016
https://dl.acm.org/doi/10.5555/2971808.2972160
Schlichtmann UDavoodi AYoung E(2015)Beyond GORDIAN and KraftwerkProceedings of the 2015 Symposium on International Symposium on Physical Design10.1145/2717764.2723571(133-140)Online publication date: 29-Mar-2015
https://dl.acm.org/doi/10.1145/2717764.2723571
Strasser MEick MGräb HSchlichtmann UJohannes FNassif SRoychowdhury J(2008)Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functionsProceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design10.5555/1509456.1509530(306-313)Online publication date: 10-Nov-2008
https://dl.acm.org/doi/10.5555/1509456.1509530

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The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis

The sizing rules method for analog integrated circuit design

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The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis

The sizing rules method for analog integrated circuit design

ASIC Design of Reversible Multiplier Circuit

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