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State-logic relations in autonomous sequential networks

Published: 03 December 1958 Publication History

Abstract

Synopsis: A sequential network consists of an interconnection of logical elements, such as "and"-gates, "or"-gates, inverters, etc., and storage elements, such as flip-flops and delay lines. These networks process signals, usually binary signals, in the sense that they convert input sequences of 0's and 1's into output sequences functionally related to the input sequences. Typically, these networks occur as parts of digital computers and control systems, and perform operations such as counting, code conversion, program control, addition, comparison, sequence generation, etc. Such networks are presently designed by unsystematic cut-and-try methods. Consequently they are unnecessarily costly, and are often more difficult to test and maintain because of the lack of patterned structure in their realization.

References

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The Synthesis and Analysis of Digital Systems by Boolean Matrices, J. O. Campeau. Transactions, Professional Group on Electronic Computers, Institute of Radio Engineers, New York, N. Y., vol. EC-G(4), Dec. 1957, pp. 231--41.
[2]
A Study of the Memory Requirements of Sequential Switching Circuits, D. A. Huffman. Technical Report No. 293, Massachusetts Institute of Technology Research Laboratory of Electronics, Cambridge, Mass., 1955.
[3]
Switching Circuits and Logical Design (book), S. H. Caldwell. John Wiley & Sons, Inc., New York, N. Y., 1958.
[4]
Application of Boolean Algebra to Switching Circuit Design and to Error Detection, D. E. Muller. Transactions, Professional Group on Electronic Computers, Institute of Radio Engineers, vol. EC-3(3), Sept. 1954, pp. 6--11.
[5]
Gedanken Experiments on Sequential Machines, E. F. Moore. "Automata Studies" (book), C. E. Shannon, J. McCarthy, Editors, Princeton University Press, Princeton, N. J., 1956, pp. 120--53.
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A Method for Synthesizing Sequential Circuits. Bell System Technical Journal, New York, N. Y., vol. 34, no. 3, Sept. 1955, pp. 1045--079.
[7]
The Synthesis of Linear Sequential Coding Networks, D. A. Huffman. Proceedings, Third London Symposium on Information Theory, London, England, Sept. 1955, also Information Theory (book), C. Cherry. Academic Press, New York, N. Y., 1956.
[8]
Synthesis of Electronic Computing and Control Circuits (book). Harvard Computation Laboratory, Harvard University, Harvard University Press, Cambridge, Mass., 1951, pp. 266--70.
[9]
Theory of Autonomous Linear Sequential Networks, B. Elspas. Transactions, Professional Group on Circuit Theory, Institute of Radio Engineers, New York, N. Y., vol. CT-6, no. 1, Mar. 1959.
[10]
On the Measure of Normal Formulas, R. McNaughton. Pacific Journal of Mathematics, Berkeley, Calif., vol. 7, no. 1, 1957, pp. 969--82.

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cover image ACM Conferences
AIEE-ACM-IRE '58 (Eastern): Papers and discussions presented at the December 3-5, 1958, eastern joint computer conference: Modern computers: objectives, designs, applications
December 1958
214 pages
ISBN:9781450378666
DOI:10.1145/1458043
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 03 December 1958

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  • (1996)Balance testing and balance-testable design of logic circuitsJournal of Electronic Testing: Theory and Applications10.1007/BF001360778:1(71-86)Online publication date: 1-Feb-1996
  • (1971)CELLULAR LOGICRecent Developments in Switching Theory10.1016/B978-0-12-509850-2.50012-9(255-313)Online publication date: 1971
  • (1967)Circuiti autonomi nonsingolari din elementi binari, realizzabili medianten elementi a sogliaCalcolo10.1007/BF026416464:1(91-105)Online publication date: Mar-1967
  • (1967)Zur Binären Einbettung Endlicher Automaten3. Colloquium über Automatentheorie10.1007/978-3-0348-5879-3_4(38-46)Online publication date: 1967
  • (1966)Analysis of Iterative NOR Autonomous Sequential MachinesIEEE Transactions on Electronic Computers10.1109/PGEC.1966.264364EC-15:4(569-577)Online publication date: Aug-1966
  • (1965)Autonomous Clocks in Sequential MachinesIEEE Transactions on Electronic Computers10.1109/PGEC.1965.264156EC-14:3(467-472)Online publication date: Jun-1965
  • (1964)Invertible Boolean FunctionsIEEE Transactions on Electronic Computers10.1109/PGEC.1964.263724EC-13:5(529-541)Online publication date: Oct-1964
  • (1963)Counting with Nonlinear Binary Feedback Shift RegistersIEEE Transactions on Electronic Computers10.1109/PGEC.1963.263465EC-12:4(357-361)Online publication date: Aug-1963
  • (1960)Self-Complementary Symmetry Types of Boolean FunctionsIEEE Transactions on Electronic Computers10.1109/TEC.1960.5219832EC-9:2(264-266)Online publication date: Jun-1960
  • (1960)Constant-Weight Counters and Decoding TreesIEEE Transactions on Electronic Computers10.1109/TEC.1960.5219823EC-9:2(231-244)Online publication date: Jun-1960
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