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Declarative aspects of memory management in the concurrent collections parallel programming model

Published: 20 January 2009 Publication History

Abstract

Concurrent Collections (CnC) is a declarative parallel language that allows the application developer to express their parallel application as a collection of high-level computations called steps that communicate via single-assignment data structures called items.
A CnC program is specified in two levels. At the bottom level, an existing imperative language implements the computations within the individual computation steps. At the top level, CnC describes the relationships (ordering constraints) among the steps. The memory management mechanism of the existing imperative language manages data whose lifetime is within a computation step. A key limitation in the use of CnC for long-running programs is the lack of memory management and garbage collection for data items with lifetimes that are longer than a single computation step. Although the goal here is the same as that of classical garbage collection, the nature of problem and therefore nature of the solution is distinct. The focus of this paper is the memory management problem for these data items in CnC.
We introduce a new declarative slicing annotation for CnC that can be transformed into a reference counting procedure for memory management. Preliminary experimental results obtained from a Cholesky example show that our memory management approach can result in space reductions for CnC data items of up to 28x relative to the baseline case of standard CnC without memory management.

References

[1]
Zoran Budimlic, Aparna Chandramowlishwaran, Kathleen Knobe, Geoff Lowney, Vivek Sarkar, and Leo Treggiari. Multi-core implementations of the concurrent collections programming model. In CPC '09: 14th International Workshop on Compilers for Parallel Computers. Springer, January 2009.
[2]
Alfredo Buttari, Julien Langou, Jakub Kurzak, and Jack Dongarra. A class of parallel tiled linear algebra algorithms for multicore architectures. Lapack working Note 191, abs/0709.1272, 2007.
[3]
Philippe Charles, Christopher Donawa, Kemal Ebcioglu, Christian Grothoff, Allan Kielstra, Christoph von Praun, Vijay Saraswat, and Vivek Sarkar. X10: an object-oriented approach to non-uniform cluster computing. In Proceedings of OOPSLA '05, pages 519--538, New York, NY, USA, 2005. ACM Press.
[4]
Intel Corporation. Thread building blocks. http://www.threadingbuildingblocks.org/.
[5]
K. Gharachorloo, V. Sarkar, and J. L. Hennessy. Efficient Implementation of Single Assignment Languages. ACM Conference on Lisp and Functional Programming, pages 259--268, July 1988.
[6]
Habanero multicore software research project web page. http://habanero.rice.edu.
[7]
Paul Hudak and Adrienne Bloss. The aggregate update problem in functional programming systems. Proceedings of the Twelfth Annual ACM Conference on the Principles of Programming Languages, pages 300--313, January 1985.
[8]
Intel (r) concurrent collections for c/c++. http://softwarecommunity.intel.com/articles/eng/3862.htm.
[9]
Kathleen Knobe and Carl D. Offner. Tstreams: A model of parallel computation (preliminary report). Technical Report HPL-2004-78, HP Labs, 2004.
[10]
William Pugh and Evan Rosser. Iteration space slicing and its application to communication optimization. In ICS '97: Proceedings of the 11th international conference on Supercomputing, pages 221--228, New York, NY, USA, 1997. ACM.

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cover image ACM Conferences
DAMP '09: Proceedings of the 4th workshop on Declarative aspects of multicore programming
January 2009
76 pages
ISBN:9781605584171
DOI:10.1145/1481839
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 20 January 2009

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  1. concurrent collections
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  • (2018)Data-Driven Thread Execution on Heterogeneous ProcessorsInternational Journal of Parallel Programming10.1007/s10766-016-0486-646:2(198-224)Online publication date: 1-Apr-2018
  • (2016)User-Assisted Store Recycling for Dynamic Task Graph SchedulersACM Transactions on Architecture and Code Optimization10.1145/301811113:4(1-24)Online publication date: 28-Dec-2016
  • (2012)Measuring the overhead of Intel C++ Concurrent Collections over Threading Building Blocks for Gauss–Jordan eliminationConcurrency and Computation: Practice & Experience10.1002/cpe.281124:18(2282-2301)Online publication date: 1-Dec-2012
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  • (2011)SCnCProceedings of the 2011 First Workshop on Data-Flow Execution Models for Extreme Scale Computing10.1109/DFM.2011.13(58-65)Online publication date: 10-Oct-2011
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  • (2009)The habanero multicore software research projectProceedings of the 24th ACM SIGPLAN conference companion on Object oriented programming systems languages and applications10.1145/1639950.1639989(735-736)Online publication date: 25-Oct-2009

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