research-article

CFU: multi-purpose configurable filtering unit for mobile multimedia applications on graphics hardware

Authors:

Chia-Ming Chang,

Shao-Yi ChienAuthors Info & Claims

HPG '09: Proceedings of the Conference on High Performance Graphics 2009

Pages 29 - 36

https://doi.org/10.1145/1572769.1572775

Published: 01 August 2009 Publication History

Abstract

In order to increase the capability of mobile GPUs in image/video processing, a multi-purpose configurable filtering unit (CFU), which is a new configurable unit for image filtering on stream processing architecture, is proposed in this paper. CFU is located in the texture unit of a GPU and can efficiently execute many kinds of filtering operations by directly accessing multi-bank texture cache and specially-designed data-paths. The following programmabilities are supported in our proposed CFU. First, different sampling point windows can be selected by programmers. Besides, the arithmetic type of the filter can be chosen. Not only original texture filtering functions and finite impulse response (FIR) filters, morphological operations in computer vision are also embedded in CFU. Furthermore, the weighting coefficients of FIR filters and morphological operations can be defined by programmers. Simulation results show that in average, compared with conventional texture unit, 25.35% of processing time in H.264/AVC motion compensation and 58.6% of processing time in video segmentation can be reduced with the assistance of CFU.

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Cited By

Chen YChien S(2019)Configurable Texture Unit for Convolutional Neural Networks on Graphics Processing Units2019 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)10.1109/AICAS.2019.8771629(234-238)Online publication date: Mar-2019
https://doi.org/10.1109/AICAS.2019.8771629
Chen YLin YWu HChang CChien S(2013)HD video decoding scheme based on mobile heterogeneous system architecture2013 IEEE International Conference on Acoustics, Speech and Signal Processing10.1109/ICASSP.2013.6638159(2761-2765)Online publication date: May-2013
https://doi.org/10.1109/ICASSP.2013.6638159
Kim HYoon JHwang KKim YPark JKim L(2012)A Reconfigurable Heterogeneous Multimedia Processor for IC-Stacking on Si-InterposerIEEE Transactions on Circuits and Systems for Video Technology10.1109/TCSVT.2011.217120922:4(589-604)Online publication date: 1-Apr-2012
https://dl.acm.org/doi/10.1109/TCSVT.2011.2171209
Show More Cited By

Index Terms

CFU: multi-purpose configurable filtering unit for mobile multimedia applications on graphics hardware
1. Computing methodologies
  1. Computer graphics
    1. Graphics systems and interfaces
      1. Graphics processors
    2. Image manipulation
      1. Texturing

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Published In

cover image ACM Conferences

HPG '09: Proceedings of the Conference on High Performance Graphics 2009

August 2009

185 pages

ISBN:9781605586038

DOI:10.1145/1572769

Editors:
Stephen N. Spencer
University of Washington
,
David McAllister
NVIDIA
,
Matt Pharr
Intel
,
Ingo Wald
Intel
,
General Chairs:
David Luebke
NVIDIA
,
Philipp Slusallek
DFKI & Saarland University

Copyright © 2009 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGGRAPH: ACM Special Interest Group on Computer Graphics and Interactive Techniques
EUROGRAPHICS: The European Association for Computer Graphics

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 August 2009

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National Science Council Taiwan

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HPG 2009

Sponsor:

SIGGRAPH
EUROGRAPHICS

HPG 2009: High Performance Graphics

August 1 - 3, 2009

Louisiana, New Orleans

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Overall Acceptance Rate 15 of 44 submissions, 34%

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Cited By

Chen YChien S(2019)Configurable Texture Unit for Convolutional Neural Networks on Graphics Processing Units2019 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)10.1109/AICAS.2019.8771629(234-238)Online publication date: Mar-2019
https://doi.org/10.1109/AICAS.2019.8771629
Chen YLin YWu HChang CChien S(2013)HD video decoding scheme based on mobile heterogeneous system architecture2013 IEEE International Conference on Acoustics, Speech and Signal Processing10.1109/ICASSP.2013.6638159(2761-2765)Online publication date: May-2013
https://doi.org/10.1109/ICASSP.2013.6638159
Kim HYoon JHwang KKim YPark JKim L(2012)A Reconfigurable Heterogeneous Multimedia Processor for IC-Stacking on Si-InterposerIEEE Transactions on Circuits and Systems for Video Technology10.1109/TCSVT.2011.217120922:4(589-604)Online publication date: 1-Apr-2012
https://dl.acm.org/doi/10.1109/TCSVT.2011.2171209
Olano MBaker DGriffin WBarczak J(2011)Variable bit rate GPU texture decompressionProceedings of the Twenty-second Eurographics conference on Rendering10.1111/j.1467-8659.2011.01989.x(1299-1308)Online publication date: 27-Jun-2011
https://dl.acm.org/doi/10.1111/j.1467-8659.2011.01989.x
Chen TSun CSu HChien SDeguchi DIde IMurase H(2011)Power-Efficient Hardware Architecture of K-Means Clustering With Bayesian-Information-Criterion Processor for Multimedia Processing ApplicationsIEEE Journal on Emerging and Selected Topics in Circuits and Systems10.1109/JETCAS.2011.21652311:3(357-368)Online publication date: Sep-2011
https://doi.org/10.1109/JETCAS.2011.2165231
Kim HYoon JHwang KKim YPark JKim L(2011)A 275mW heterogeneous multimedia processor for IC-stacking on Si-interposer2011 IEEE International Solid-State Circuits Conference10.1109/ISSCC.2011.5746249(128-130)Online publication date: Feb-2011
https://doi.org/10.1109/ISSCC.2011.5746249
Chang CChen YLu YLin CChen LChien S(2011)A 172.6mW 43.8GFLOPS energy-efficient scalable eight-core 3D graphics processor for mobile multimedia applicationsIEEE Asian Solid-State Circuits Conference 201110.1109/ASSCC.2011.6123602(405-408)Online publication date: Nov-2011
https://doi.org/10.1109/ASSCC.2011.6123602

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