research-article

Run-time reconfigurability in embedded multiprocessors

Authors:

Madhura Purnaprajna,

Mario Porrmann,

Ulrich RueckertAuthors Info & Claims

ACM SIGARCH Computer Architecture News, Volume 37, Issue 2

Pages 30 - 37

https://doi.org/10.1145/1577129.1577135

Published: 23 July 2009 Publication History

Abstract

To meet application-specific performance demands, architectures are predominantly redesigned and customised. Every architectural change results in huge overheads in design, verification, and fabrication, which together result in prolonged time-to-market. As an alternative, configurable architectures provide easy adaptability to different application domains in place of costly redesigns. To deal with application changes and custom requirements, a method of configuring and reusing the basic building blocks within processors is developed. Additionally, this enables co-operative multiprocessing. In this paper, a runtime reconfiguration mechanism for embedded multiprocessor architectures is proposed as a method to introduce customisations in the post-fabrication phase. A method of application description in conjunction with a flexible reconfigurable multiprocessor template is presented. Finally, the costs and benefits of this approach are analysed for computationally intensive algorithms used in digital signal processing. The impact of application specific characteristics on execution time, power consumption, and total energy dissipation are analysed.

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Cited By

Anacker HDellnitz MFlaßkamp KGroesbrink SHartmann PHeinzemann CHorenkamp CKleinjohann BKleinjohann LKorf SKrüger MMüller WOber-Blöbaum SOberthür SPorrmann MPriesterjahn CRadkowski RRasche CRieke JRingkamp MStahl KSteenken DStöcklein JTimmermann RTrächtler AWitting KXie TZiegert S(2014)Methods for the Design and DevelopmentDesign Methodology for Intelligent Technical Systems10.1007/978-3-642-45435-6_5(183-350)Online publication date: 2014
https://doi.org/10.1007/978-3-642-45435-6_5

Index Terms

Run-time reconfigurability in embedded multiprocessors

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Published In

cover image ACM SIGARCH Computer Architecture News

ACM SIGARCH Computer Architecture News Volume 37, Issue 2

May 2009

69 pages

ISSN:0163-5964

DOI:10.1145/1577129

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Copyright © 2009 Authors.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 23 July 2009

Published in SIGARCH Volume 37, Issue 2

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Cited By

Anacker HDellnitz MFlaßkamp KGroesbrink SHartmann PHeinzemann CHorenkamp CKleinjohann BKleinjohann LKorf SKrüger MMüller WOber-Blöbaum SOberthür SPorrmann MPriesterjahn CRadkowski RRasche CRieke JRingkamp MStahl KSteenken DStöcklein JTimmermann RTrächtler AWitting KXie TZiegert S(2014)Methods for the Design and DevelopmentDesign Methodology for Intelligent Technical Systems10.1007/978-3-642-45435-6_5(183-350)Online publication date: 2014
https://doi.org/10.1007/978-3-642-45435-6_5

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