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Complete nanowire crossbar framework optimized for the multi-spacer patterning technique

Published: 11 October 2009 Publication History

Abstract

Nanowire crossbar circuits are an emerging architectural paradigm that promises a higher integration density and an improved fault-tolerance due to its reconfigurability. In this paper, we propose for the first time the utilization of the multi-spacer patterning technique to fabricate nanowire crossbars with a high cross-point density up to 1010 cm(-2). We propose a novel decoder fabrication method that can be included in a process dedicated to the multi-spacer patterning technique. We address the technology problems consisting in the variability and fabrication complexity at the design level by optimizing the encoding scheme. We show an overall reduction of the variability by 18% and a cancelation of the fabrication complexity overhead.

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Cited By

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  • (2019)Memory Effects in Multi-terminal Solid State Devices and Their ApplicationsHandbook of Memristor Networks10.1007/978-3-319-76375-0_36(1021-1064)Online publication date: 8-Nov-2019
  • (2016)Synthesis and Fabrication of Semiconductor NanowiresNanowire Transistors10.1017/CBO9781107280779.004(54-80)Online publication date: 5-Apr-2016
  • (2012)Multiterminal Memristive Nanowire Devices for Logic and Memory Applications: A ReviewProceedings of the IEEE10.1109/JPROC.2011.2172569100:6(2008-2020)Online publication date: Jun-2012
  • Show More Cited By

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  1. Complete nanowire crossbar framework optimized for the multi-spacer patterning technique

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        cover image ACM Conferences
        CASES '09: Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
        October 2009
        298 pages
        ISBN:9781605586267
        DOI:10.1145/1629395
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Publication History

        Published: 11 October 2009

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        Author Tags

        1. MSPT
        2. crossbars
        3. decoder
        4. emerging technologies
        5. gray code
        6. nanowires
        7. spacer technique

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        ESWeek '09
        ESWeek '09: Fifth Embedded Systems Week
        October 11 - 16, 2009
        Grenoble, France

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        Overall Acceptance Rate 52 of 230 submissions, 23%

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        View all
        • (2019)Memory Effects in Multi-terminal Solid State Devices and Their ApplicationsHandbook of Memristor Networks10.1007/978-3-319-76375-0_36(1021-1064)Online publication date: 8-Nov-2019
        • (2016)Synthesis and Fabrication of Semiconductor NanowiresNanowire Transistors10.1017/CBO9781107280779.004(54-80)Online publication date: 5-Apr-2016
        • (2012)Multiterminal Memristive Nanowire Devices for Logic and Memory Applications: A ReviewProceedings of the IEEE10.1109/JPROC.2011.2172569100:6(2008-2020)Online publication date: Jun-2012
        • (2011)Realistic limits to computationApplied Physics A10.1007/s00339-011-6724-2106:4(967-982)Online publication date: 24-Dec-2011
        • (2011)Fabrication of Nanowire CrossbarsRegular Nanofabrics in Emerging Technologies10.1007/978-94-007-0650-7_2(33-73)Online publication date: 24-Mar-2011
        • (2010)Two Routes to Subcellular SensingNanotechnology for Electronics, Photonics, and Renewable Energy10.1007/978-1-4419-7454-9_5(153-182)Online publication date: 20-Oct-2010

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