research-article

Low-power current-mode transceiver for on-chip bidirectional buses

Authors:

Marshnil Dave,

Rajkumar Satkuri,

Mahavir Jain,

Maryam Shojaei Baghini,

Dinesh K. SharmaAuthors Info & Claims

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

Pages 61 - 66

https://doi.org/10.1145/1840845.1840859

Published: 18 August 2010 Publication History

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Abstract

This paper presents a current-mode signalling scheme for bidirectional long on-chip interconnects. The transceiver has been fabricated in 180nm CMOS process. Features of the proposed scheme are driver pre-emphasis and low impedance termination. While no extra repeater is needed for line lengths up to 8mm long the scheme improves the delay by 34% for 2mm-8mm long lines, compared to bidirectional voltage-mode links. The scheme also improves the power performance for line lengths longer than 2mm, operating at data rates higher than 180Mbps. Measurement results show that delay and power-delay product improve by 18% and 3.7x, respectively, compared to simulation results of the voltage-mode scheme.

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Cited By

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Ebrahimi Jarihani ASturm JTonello A(2021)A full‐duplex transceiver for 20‐Gbps high‐speed simultaneous bidirectional signaling across global on‐chip interconnectionsInternational Journal of Circuit Theory and Applications10.1002/cta.311649:10(3455-3465)Online publication date: 26-Aug-2021
https://doi.org/10.1002/cta.3116
Ebrahimi Jarihani ASarafi SKoeberle MSturm JTonello A(2020)A 16 Gbps, Full-Duplex Transceiver over Lossy On-Chip Interconnects in 28 nm CMOS TechnologyElectronics10.3390/electronics90507179:5(717)Online publication date: 26-Apr-2020
https://doi.org/10.3390/electronics9050717
Venuturpalli PGovindaswamy PRao Pasupureddi V(2020)Residue Monitor Enabled Charge-Mode Adaptive Echo-Cancellation for Simultaneous Bidirectional Signaling over On-Chip InterconnectsMicroelectronics Journal10.1016/j.mejo.2020.104899(104899)Online publication date: Sep-2020
https://doi.org/10.1016/j.mejo.2020.104899
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Index Terms

Low-power current-mode transceiver for on-chip bidirectional buses
1. Hardware
  1. Integrated circuits

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Published In

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

August 2010

458 pages

ISBN:9781450301466

DOI:10.1145/1840845

General Chairs:
Vojin Oklobdzija
University of Texas, Dallas
,
Barry Pangle
Mentor Graphics
,
Naehyuck Chang
Seoul National University
,
Program Chairs:
Naresh Shanbhag
University of Illinois at Urbana-Champaign
,
Chris H. Kim
University of Minnesota

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 18 August 2010

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ISLPED'10

Sponsor:

SIGDA

ISLPED'10: International Symposium on Low Power Electronics and Design

August 18 - 20, 2010

Texas, Austin, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

View all

Ebrahimi Jarihani ASturm JTonello A(2021)A full‐duplex transceiver for 20‐Gbps high‐speed simultaneous bidirectional signaling across global on‐chip interconnectionsInternational Journal of Circuit Theory and Applications10.1002/cta.311649:10(3455-3465)Online publication date: 26-Aug-2021
https://doi.org/10.1002/cta.3116
Ebrahimi Jarihani ASarafi SKoeberle MSturm JTonello A(2020)A 16 Gbps, Full-Duplex Transceiver over Lossy On-Chip Interconnects in 28 nm CMOS TechnologyElectronics10.3390/electronics90507179:5(717)Online publication date: 26-Apr-2020
https://doi.org/10.3390/electronics9050717
Venuturpalli PGovindaswamy PRao Pasupureddi V(2020)Residue Monitor Enabled Charge-Mode Adaptive Echo-Cancellation for Simultaneous Bidirectional Signaling over On-Chip InterconnectsMicroelectronics Journal10.1016/j.mejo.2020.104899(104899)Online publication date: Sep-2020
https://doi.org/10.1016/j.mejo.2020.104899
Wary NMandal P(2017)Current-Mode Full-Duplex Transceiver for Lossy On-Chip Global InterconnectsIEEE Journal of Solid-State Circuits10.1109/JSSC.2017.269741052:8(2026-2037)Online publication date: Aug-2017
https://doi.org/10.1109/JSSC.2017.2697410
Wary NMandal P(2015)Current-mode simultaneous bidirectional transceiver for on-chip global interconnects2015 6th Asia Symposium on Quality Electronic Design (ASQED)10.1109/ACQED.2015.7274001(19-24)Online publication date: Aug-2015
https://doi.org/10.1109/ACQED.2015.7274001
Xinsheng Wang Mingyang Hu Mingyan Yu (2013)Robust current-mode on-chip interconnect signaling scheme in deep submicron2013 IEEE 10th International Conference on ASIC10.1109/ASICON.2013.6811910(1-4)Online publication date: Oct-2013
https://doi.org/10.1109/ASICON.2013.6811910
Vishnani ADave MBaghini MSharma D(2011)A fully on-chip throughput measurement system for multi-gigabits/s on-chip interconnects2011 3rd Asia Symposium on Quality Electronic Design (ASQED)10.1109/ASQED.2011.6111713(119-124)Online publication date: Jul-2011
https://doi.org/10.1109/ASQED.2011.6111713
Huang HPu R(2011)Differential bidirectional transceiver for on-chip long wiresMicroelectronics Journal10.1016/j.mejo.2011.08.00142:11(1208-1215)Online publication date: Nov-2011
https://doi.org/10.1016/j.mejo.2011.08.001

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