research-article

In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits

Authors:

Nandish Ashutosh Mehta,

Gururaj V. Naik,

Bharadwaj S. AmruturAuthors Info & Claims

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

Pages 259 - 264

https://doi.org/10.1145/1840845.1840899

Published: 18 August 2010 Publication History

Abstract

An in-situ power monitoring technique for Dynamic Voltage and Threshold scaling (DVTS) systems is proposed which measures total power consumed by load circuit using sleep transistor acting as power sensor. Design details of power monitor are examined using simulation framework in UMC 90nm CMOS process. Experimental results of test chip fabricated in AMS 0.35µm CMOS process are presented. The test chip has variable activity between 0.05 and 0.5 and has PMOS VTH control through nWell contact. Maximum resolution obtained from power monitor is 0.25mV. Overhead of power monitor in terms of its power consumption is 0.244 mW (2.2% of total power of load circuit). Lastly, power monitor is used to demonstrate closed loop DVTS system. DVTS algorithm shows 46.3% power savings using in-situ power monitor.

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Cited By

Vasudevamurthy RDas PAmrutur B(2018)Time-Based All-Digital Technique for Analog Built-in Self-TestIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2013.224290922:2(334-342)Online publication date: 29-Dec-2018
https://dl.acm.org/doi/10.1109/TVLSI.2013.2242909
Mehta NAmrutur B(2018)Dynamic supply and threshold voltage scaling for CMOS digital circuits using in-situ power monitorIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2011.213276520:5(892-901)Online publication date: 29-Dec-2018
https://dl.acm.org/doi/10.1109/TVLSI.2011.2132765
Bhagavatula SByunghoo Jung Yung-Hsiang Lu (2014)Real-Time Power Sensors for Intelligent Power Management and BeyondIEEE Design & Test10.1109/MDAT.2014.232553431:4(27-35)Online publication date: Aug-2014
https://doi.org/10.1109/MDAT.2014.2325534
Show More Cited By

Index Terms

In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits
1. Hardware
  1. Very large scale integration design
    1. Application-specific VLSI designs
      1. Application specific processors

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Published In

cover image ACM Conferences

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

August 2010

458 pages

ISBN:9781450301466

DOI:10.1145/1840845

General Chairs:
Vojin Oklobdzija
University of Texas, Dallas
,
Barry Pangle
Mentor Graphics
,
Naehyuck Chang
Seoul National University
,
Program Chairs:
Naresh Shanbhag
University of Illinois at Urbana-Champaign
,
Chris H. Kim
University of Minnesota

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 18 August 2010

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ISLPED'10

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ISLPED'10: International Symposium on Low Power Electronics and Design

August 18 - 20, 2010

Texas, Austin, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

Vasudevamurthy RDas PAmrutur B(2018)Time-Based All-Digital Technique for Analog Built-in Self-TestIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2013.224290922:2(334-342)Online publication date: 29-Dec-2018
https://dl.acm.org/doi/10.1109/TVLSI.2013.2242909
Mehta NAmrutur B(2018)Dynamic supply and threshold voltage scaling for CMOS digital circuits using in-situ power monitorIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2011.213276520:5(892-901)Online publication date: 29-Dec-2018
https://dl.acm.org/doi/10.1109/TVLSI.2011.2132765
Bhagavatula SByunghoo Jung Yung-Hsiang Lu (2014)Real-Time Power Sensors for Intelligent Power Management and BeyondIEEE Design & Test10.1109/MDAT.2014.232553431:4(27-35)Online publication date: Aug-2014
https://doi.org/10.1109/MDAT.2014.2325534
Nakutis Z(2013)A Current Consumption Measurement Approach for FPGA-Based Embedded SystemsIEEE Transactions on Instrumentation and Measurement10.1109/TIM.2013.224503662:5(1130-1137)Online publication date: May-2013
https://doi.org/10.1109/TIM.2013.2245036
Cho MSong WYalamanchili SMukhopadhyay S(2012)Thermal system identification (TSI): A methodology for post-silicon characterization and prediction of the transient thermal field in multicore chips2012 28th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM)10.1109/STHERM.2012.6188836(118-124)Online publication date: Mar-2012
https://doi.org/10.1109/STHERM.2012.6188836
Nakutis Z(2012)A consumption current measurement approach for FPGA based embedded systems2012 IEEE International Instrumentation and Measurement Technology Conference Proceedings10.1109/I2MTC.2012.6229202(328-333)Online publication date: May-2012
https://doi.org/10.1109/I2MTC.2012.6229202
Vasudevamurthy RDas PAmrutur B(2011)A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test2011 IEEE International Symposium of Circuits and Systems (ISCAS)10.1109/ISCAS.2011.5937996(2035-2038)Online publication date: May-2011
https://doi.org/10.1109/ISCAS.2011.5937996

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