TimeBench: a CAD tool for real-time system design
Abstract
This paper provides an overview of TimeBench, a prototype CAD tool for designing real-time systems, as well as some experiences gained through building and using it. TimeBench aims to support a true engineering design process for real-time systems in a largely graphical working environment. The environment includes support for design synthesis, analysis, and system generation, with equal emphasis on the design of operational structure and the design of temporal behavior. Its main features include: (1) a hybrid graphical---textual design description notation (MachineCharts, Abstract Controller Machines, and MachineChart Language), (2) design experimentation through an embedded interpreter and behavior visualization tools to animate designs, (3) further design evaluation through a performance modelling tool based on fast approximate analystic methods, and (4) a code generation system than can be tailored to produce code for a desired environment.
References
[1]
[1] R.J.A. Buhr, Practical Visual Techniques in System Design, Prentice-Hall, 1990.
[2]
[2] R.J.A. Buhr, "Practical Visual Techniques for Joint Refinement of Structure and Temporal Behavior in Reactive System Design," Proc. Compeuro '90, Tel Aviv, Israel, May 1990.
[3]
[3] R.J.A. Buhr, G.M. Karam, and R. Casselman, "Support for Specifying Temporal Behavior in Ada Designs," Proc. 1st Int'l Symp. on Environments and Tools for Ada (SETA1), Redondo Beach, CA, May 1990.
[4]
[4] R.J.A. Buhr, G.M. Karam, C.M. Woodside, and C.J. Hayes, "Software CAD: A Revolutionary Approach," IEEE Trans. on Software Eng., Vol. 15, No. 3, Mar. 1989, pp. 235-249.
[5]
[5] R.J.A. Buhr, System Design With Ada, Prentice-Hall, 1984.
[6]
[6] C.-K. Chang (ed.), Principles of Visual Programming Systems, Englewood Cliffs, NJ:Prentice-Hall, 1990.
[7]
[7] G.M. Karam (editor), "TimeBench," product description for IEEE Software Tools Fair issue, vol. 7, no. 3, May 1990, pp. 39.
[8]
[8] D. Harel, H. Lachover, A. Naamad, A. Pnueli, M. Politi, R. Sherman, A. Shtul-Trauring, "Statemate: A Working Environment for the Development of Complex, Reactive Systems," Proc. 10th Int'l Conf. on Software Eng., Singapore, April 1988.
[9]
[9] D. Peng and K.G. Shin, "Modeling of Concurrent Task Execution in a Distributed System for Real-Time Control," IEEE Trans. on Computers, Vol. C-36, No. 4, April 1987, pp. 500-516.
[10]
[10] S.P. Reiss, "PECAN: Program Development Systems that Support Multiple Views," IEEE Trans. on Software Engineering, vol. SE-11, no. 3, March 1985, pp. 276-284.
[11]
[11] J.T. Schwartz, R.B.K. Dewar, E. Dubinsky, and E. Schonberg, Programming with Sets: An Introduction to SETL, New York, NY:Springer-Verlag, 1986.
[12]
[12] H.J. Scott and G.M. Karam, Meta-Code Generation in a Design Environment, Technical Report, Department of Systems and Computer Eng., Carleton University, Ottawa, CA, 1991.
[13]
[13] C.U. Smith, Performance Engineering of Software Systems, Addison-Wesley:Reading, MASS, 1990.
[14]
[14] C.M. Woodside, "Throughput Calculation for Basic Stochastic Rendezvous Networks," Perf. Evaluation, Vol. 9, 1989, pp. 143-160.
[15]
[15] C.M. Woodside, J.E. Neilson, D.C. Petriu, and S. Majumdar, The Rendezvous Network Model for Performance Synchronous Multi-Tasking Distributed Software, Tech. Rep. SCE-89-8, Dept. of Systems & Comp. Eng., Carleton University, Ottawa, CANADA, March 1989.
[16]
[16] C.M. Woodside, J.E. Neilson, J.W. Miernik, D.C. Petriu, and R. Constantin, "Performance of Concurrent Rendezvous Systems with Complex Pipeline Structures," in Proc. 4th Int'l Conf. in Modelling Techniques and Tools for Computer Performance Evaluation, September 1988, pp. 361-378.
[17]
[17] C.M. Woodside, E.M. Hagos, E. Neron, and R.J.A. Buhr, "The CAEDE Performance Analysis Tool," in Proc. of the 1st Intl. Symp. on Environments and Tools for Ada (SETA1), May 1990, Redondo Beach, CA.
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Published: 01 September 1994
Published in SIGADA Volume XIV, Issue SI
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