Cited By
View all- Arap OBrown GHimebaugh BSwany M(2014)Software Defined Multicasting for MPI Collective Operation Offloading with the NetFPGAEuro-Par 2014 Parallel Processing10.1007/978-3-319-09873-9_53(632-643)Online publication date: 2014
An accelerated and energy-efficient traffic monitor using the NetFPGA (abstract only)
Page 277
Abstract
A traffic monitor system has been implemented on the NetFPGA. The NetFPGA is an open networking platform accelerator that enables researchers and instructors to build working prototypes of high-speed, hardware-accelerated networking systems. The traffic monitor application allows network packets to be captured and analyzed from up to all four of the Gigabit Ethernet ports. A graphical user interface showing the traffic of any port has been implemented on top of it. The project has been implemented as a fully open-source project and serves as an exemplar project on how to build and distribute NetFPGA applications. All the code (Verilog, hardware, system software, verification scripts, makefiles, and support tools) can be freely downloaded from the NetFPGA.org website. System performance has been compared with other two implementations: one using the same NetFPGA architecture but implementing the reference router with port mirroring, and the other being a software implementation built on top of the Click Modular Router.
References
[1]
http://netfpga.org/foswiki/bin/view/netfpga/onegig/trafficmonitor.
[2]
http://www.accenttechnologyinc.com/.
[3]
Netfpga project table. http://netfpga.org/foswiki/bin/view/netfpga/onegig/projecttable.
[4]
Netfpga team. netfpga website. http://netfpga.org.
[5]
Tcpdump. http://www.tcpdump.org.
[6]
Wireshark. http://www.wireshark.org.
[7]
G. A. Covington, G. Gibb, J. Naous, J. Lockwood, and N. McKeown. Methodology to contribute netfpga modules. In In International Conference on Microelectronics Systems Education, 2009.
[8]
G. Gibb, J. W. Lockwood, J. Naous, P. Hartke, and N. McKeown. Netfpga: An open platform for teaching how to build gigabit-rate network switches and routers. In In IEEE Transactions on Education, August, 2008.
[9]
E. Kohler, R. Morris, B. Chen, J. Jannotti, and M. F. Kaashoek. The click modular router. ACM Trans. Comput. Syst., 18(3):263--297, 2000.
[10]
J. W. Lockwood, N. McKeown, G. Watson, G. Gibb, P. Hartke, J. Naous, R. Raghuraman, and J. Luo. Netfpga - an open platform for gigabit-rate network switching and routing. In In International Conference on Microelectronic Systems Education, 2007.
[11]
J. Naous, G. Gibb, S. Bolouki, and N. McKeown. Netfpga: reusable router architecture for experimental research. In In PRESTO 08: Proceedings of the ACM workshop on Programmable routers for extensive services of tomorrow, pages 17, New York, NY, USA, 2008. ACM.
[12]
J. Sommers, H. Kim, and P. Barford. Harpoon: a flow-level traffic generator for router and network tests. In SIGMETRICS '04/Performance '04: Proceedings of the joint international conference on Measurement and modeling of computer systems, pages 392--392, New York, NY, USA, 2004. ACM.
[13]
G. Watson, N. McKeown, and M. Casado. Netfpga - a tool for network research and education. In In 2nd Workshop on Architecture Research using FPGA Platforms (WARFP), February, 2006.
Index Terms
- An accelerated and energy-efficient traffic monitor using the NetFPGA (abstract only)
Recommendations
ReClick - A Modular Dataplane Design Framework for FPGA-Based Network Virtualization
ANCS '11: Proceedings of the 2011 ACM/IEEE Seventh Symposium on Architectures for Networking and Communications SystemsNetwork virtualization has emerged as a powerful technique to deploy novel services and experimental protocols over shared network infrastructures. Although recent research has highlighted field programmable gate arrays (FPGAs) as attractive platforms ...
Chimpp: a click-based programming and simulation environment for reconfigurable networking hardware
ANCS '10: Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications SystemsReconfigurable network hardware makes it easier to experiment with and prototype high-speed networking systems. However, these devices are still relatively hard to program; for example, requiring users to develop in Verilog or VHDL. Further, these ...
NetFPGA: reusable router architecture for experimental research
PRESTO '08: Proceedings of the ACM workshop on Programmable routers for extensible services of tomorrowOur goal is to enable fast prototyping of networking hardware (e.g. modified Ethernet switches and IP routers) for teaching and research. To this end, we built and made available the NetFPGA platform. Starting from open-source reference designs, ...
Comments
Information & Contributors
Information
Published In
February 2011
300 pages
Copyright © 2011 Authors.
Sponsors
Publisher
Association for Computing Machinery
New York, NY, United States
Publication History
Published: 27 February 2011
Check for updates
Author Tags
Qualifiers
- Poster
Conference
FPGA '11
Sponsor:
FPGA '11: ACM/SIGDA International Symposium on Field Programmable Gate Arrays
February 27 - March 1, 2011
CA, Monterey, USA
Acceptance Rates
Overall Acceptance Rate 125 of 627 submissions, 20%
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- View Citations1Total Citations
- 0Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Reflects downloads up to 30 Aug 2024
Other Metrics
Citations
Cited By
View all- Arap OBrown GHimebaugh BSwany M(2014)Software Defined Multicasting for MPI Collective Operation Offloading with the NetFPGAEuro-Par 2014 Parallel Processing10.1007/978-3-319-09873-9_53(632-643)Online publication date: 2014
View Options
Get Access
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in