research-article

Hybrid binary rewriting for memory access instrumentation

Authors:

Tim HarrisAuthors Info & Claims

VEE '11: Proceedings of the 7th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments

Pages 227 - 238

https://doi.org/10.1145/1952682.1952711

Published: 09 March 2011 Publication History

Abstract

Memory access instrumentation is fundamental to many applications such as software transactional memory systems, profiling tools and race detectors. We examine the problem of efficiently instrumenting memory accesses in x86 machine code to support software transactional memory and profiling. We aim to automatically instrument all shared memory accesses in critical sections of x86 binaries, while achieving overhead close to that obtained when performing manual instrumentation at the source code level.

The two primary options in building such an instrumentation system are static and dynamic binary rewriting: the former instruments binaries at link time before execution, while the latter binary rewriting instruments binaries at runtime. Static binary rewriting offers extremely low overhead but is hampered by the limits of static analysis. Dynamic binary rewriting is able to use runtime information but typically incurs higher overhead. This paper proposes an alternative: hybrid binary rewriting. Hybrid binary rewriting is built around the idea of a persistent instrumentation cache (PIC) that is associated with a binary and contains instrumented code from it. It supports two execution modes when using instrumentation: active and passive modes. In the active execution mode, a dynamic binary rewriting engine (PIN) is used to intercept execution, and generate instrumentation into the PIC, which is an on-disk file. This execution mode can take full advantage of runtime information. Later, passive execution can be used where instrumented code is executed out of the PIC. This allows us to attain overheads similar to those incurred with static binary rewriting.

This instrumentation methodology enables a variety of static and dynamic techniques to be applied. For example, in passive mode, execution occurs directly from the original executable save for regions that require instrumentation. This has allowed us to build a low-overhead transactional memory profiler. We also demonstrate how we can use the combination of static and dynamic techniques to eliminate instrumentation for accesses to locations that are thread-private.

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Cited By

Burchell HLarose OMarr SErtl MKirsch C(2024)Towards Realistic Results for Instrumentation-Based Profilers for JIT-Compiled SystemsProceedings of the 21st ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes10.1145/3679007.3685058(82-89)Online publication date: 13-Sep-2024
https://dl.acm.org/doi/10.1145/3679007.3685058
Lin HDong YChi WWu ZZeng H(2023)Efficient Dynamic Binary Translation with Accumulative Persistent Code Caching2022 IEEE 28th International Conference on Parallel and Distributed Systems (ICPADS)10.1109/ICPADS56603.2022.00066(458-466)Online publication date: Jan-2023
https://doi.org/10.1109/ICPADS56603.2022.00066
Fu JLin YZhang XLi P(2014)Computation Integrity Measurement Based on Branch TransferProceedings of the 2014 IEEE 13th International Conference on Trust, Security and Privacy in Computing and Communications10.1109/TrustCom.2014.75(590-597)Online publication date: 24-Sep-2014
https://dl.acm.org/doi/10.1109/TrustCom.2014.75
Show More Cited By

Index Terms

Hybrid binary rewriting for memory access instrumentation
1. Software and its engineering
  1. Software notations and tools
    1. Compilers

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Published In

cover image ACM Conferences

VEE '11: Proceedings of the 7th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments

March 2011

250 pages

ISBN:9781450306874

DOI:10.1145/1952682

General Chair:
Erez Petrank
The Technion, Israel
,
Program Chair:
Doug Lea
SUNY Oswego, USA

ACM SIGPLAN Notices Volume 46, Issue 7
VEE '11
July 2011
231 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/2007477
Issue’s Table of Contents

Copyright © 2011 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 09 March 2011

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VEE '11

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VEE '11: ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments

March 9 - 11, 2011

California, Newport Beach, USA

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Cited By

Burchell HLarose OMarr SErtl MKirsch C(2024)Towards Realistic Results for Instrumentation-Based Profilers for JIT-Compiled SystemsProceedings of the 21st ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes10.1145/3679007.3685058(82-89)Online publication date: 13-Sep-2024
https://dl.acm.org/doi/10.1145/3679007.3685058
Lin HDong YChi WWu ZZeng H(2023)Efficient Dynamic Binary Translation with Accumulative Persistent Code Caching2022 IEEE 28th International Conference on Parallel and Distributed Systems (ICPADS)10.1109/ICPADS56603.2022.00066(458-466)Online publication date: Jan-2023
https://doi.org/10.1109/ICPADS56603.2022.00066
Fu JLin YZhang XLi P(2014)Computation Integrity Measurement Based on Branch TransferProceedings of the 2014 IEEE 13th International Conference on Trust, Security and Privacy in Computing and Communications10.1109/TrustCom.2014.75(590-597)Online publication date: 24-Sep-2014
https://dl.acm.org/doi/10.1109/TrustCom.2014.75
Chen LCui ZBao YChen MHuang YTan G(2012)A lightweight hybrid hardware/software approach for object-relative memory profilingProceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software10.1109/ISPASS.2012.6189205(46-57)Online publication date: 1-Apr-2012
https://dl.acm.org/doi/10.1109/ISPASS.2012.6189205
Zhai JJin YChen WZheng WZhai JJin YChen WZheng W(2023)Informed Memory Access MonitoringPerformance Analysis of Parallel Applications for HPC10.1007/978-981-99-4366-1_4(73-97)Online publication date: 19-Jun-2023
https://doi.org/10.1007/978-981-99-4366-1_4
Valat SBouizi O(2018)NUMAPROF, A NUMA Memory ProfilerEuro-Par 2018: Parallel Processing Workshops10.1007/978-3-030-10549-5_13(159-170)Online publication date: 27-Aug-2018
https://dl.acm.org/doi/10.1007/978-3-030-10549-5_13
Fu JZhang XLin Y(2015)An Instruction-Set Randomization Using Length-Preserving PermutationProceedings of the 2015 IEEE Trustcom/BigDataSE/ISPA - Volume 0110.1109/Trustcom.2015.397(376-383)Online publication date: 20-Aug-2015
https://dl.acm.org/doi/10.1109/Trustcom.2015.397

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