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A comprehensive approach to logic synthesis and physical design for two-dimensional logic arrays

Authors:

Andisheh Sarabi,

Ning Song,

Malgorzata Chrzanowska-Jeske,

Marek A. PerkowskiAuthors Info & Claims

DAC '94: Proceedings of the 31st annual Design Automation Conference

Pages 321 - 326

https://doi.org/10.1145/196244.196398

Published: 06 June 1994 Publication History

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Papakonstantinou G(2017)Exclusive or Sum of Complex Terms expressions minimizationIntegration, the VLSI Journal10.1016/j.vlsi.2016.08.00556:C(44-52)Online publication date: 1-Jan-2017
https://dl.acm.org/doi/10.1016/j.vlsi.2016.08.005
Voudouris DSampson MPapakonstantinou G(2008)Exact ESCT minimization for functions of up to six input variablesIntegration, the VLSI Journal10.1016/j.vlsi.2007.01.00341:1(87-105)Online publication date: 1-Jan-2008
https://dl.acm.org/doi/10.1016/j.vlsi.2007.01.003
Rahardja SFalkowski BLozano C(2005)Fastest linearly independent transforms over GF(2) and their propertiesIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2005.85220952:9(1832-1844)Online publication date: Sep-2005
https://doi.org/10.1109/TCSI.2005.852209
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A comprehensive approach to logic synthesis and physical design for two-dimensional logic arrays
1. Hardware

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DAC '94: Proceedings of the 31st annual Design Automation Conference

June 1994

739 pages

ISBN:0897916530

DOI:10.1145/196244

Chairman:
Michael Lorenzetti
Mentor Graphics Corp., Wilsonville, OR

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 06 June 1994

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DAC94: The 31st ACM/IEEE-CAS/EDAC Design Automation Conference

June 6 - 10, 1994

California, San Diego, USA

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DAC '94 Paper Acceptance Rate 100 of 260 submissions, 38%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Papakonstantinou G(2017)Exclusive or Sum of Complex Terms expressions minimizationIntegration, the VLSI Journal10.1016/j.vlsi.2016.08.00556:C(44-52)Online publication date: 1-Jan-2017
https://dl.acm.org/doi/10.1016/j.vlsi.2016.08.005
Voudouris DSampson MPapakonstantinou G(2008)Exact ESCT minimization for functions of up to six input variablesIntegration, the VLSI Journal10.1016/j.vlsi.2007.01.00341:1(87-105)Online publication date: 1-Jan-2008
https://dl.acm.org/doi/10.1016/j.vlsi.2007.01.003
Rahardja SFalkowski BLozano C(2005)Fastest linearly independent transforms over GF(2) and their propertiesIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2005.85220952:9(1832-1844)Online publication date: Sep-2005
https://doi.org/10.1109/TCSI.2005.852209
Rentergem YVos AStorme L(2005)Implementing an arbitrary reversible logic gateJournal of Physics A: Mathematical and General10.1088/0305-4470/38/16/00738:16(3555-3577)Online publication date: 6-Apr-2005
https://doi.org/10.1088/0305-4470/38/16/007
Rahardja SFalkowski B(2002)Polynomial expansions over GF(2) based on fastest transformation2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)10.1109/ISCAS.2002.1010239(III-377-III-380)Online publication date: 2002
https://doi.org/10.1109/ISCAS.2002.1010239
Tsutsui HHiwada KIzumi TOnoye TNakamura Y(2001)A design of LUT-array-based PLD and a synthesis approach based on sum of generalized complex terms expressionISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)10.1109/ISCAS.2001.922020(203-206)Online publication date: 2001
https://doi.org/10.1109/ISCAS.2001.922020
Perkowski MKerntopf PBuller AChrzanowska-Jeske MMishchenko AXiaoyu Song Al-Rabadi AJezwiak LCoppola AMassey B(2001)Regular realization of symmetric functions using reversible logicProceedings Euromicro Symposium on Digital Systems Design10.1109/DSD.2001.952289(245-252)Online publication date: 2001
https://doi.org/10.1109/DSD.2001.952289
Jung MLee GPark SDrechsler R(2001)Minimization of OPKFDDs using genetic algorithmsProceedings Euromicro Symposium on Digital Systems Design10.1109/DSD.2001.952120(72-78)Online publication date: 2001
https://doi.org/10.1109/DSD.2001.952120
Perkowski MChebotarev AMishchenko A(1999)Evolvable hardware or learning hardware? induction of state machines from temporal logic constraintsProceedings of the First NASA/DoD Workshop on Evolvable Hardware10.1109/EH.1999.785444(129-138)Online publication date: 1999
https://doi.org/10.1109/EH.1999.785444
Lee GDrechsler RPerkowski M(1999)ETDD-based synthesis of two-dimensional cellular arrays for multi-output incompletely specified Boolean functionsIEE Proceedings - Computers and Digital Techniques10.1049/ip-cdt:19990798146:6(302)Online publication date: 1999
https://doi.org/10.1049/ip-cdt:19990798
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Two-dimensional direction estimation of multiple signals using two parallel sparse linear arrays

Easily Testable Two-Dimensional Cellular Logic Arrays

Improved two-dimensional DOA estimation algorithm for two-parallel uniform linear arrays using propagator method

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Two-dimensional direction estimation of multiple signals using two parallel sparse linear arrays

Easily Testable Two-Dimensional Cellular Logic Arrays

Improved two-dimensional DOA estimation algorithm for two-parallel uniform linear arrays using propagator method

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