research-article

Defect-Aware Nanocrossbar Logic Mapping through Matrix Canonization Using Two-Dimensional Radix Sort

Authors:

H. Fatih Ugurdag,

Okan PalazAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 7, Issue 3

Article No.: 12, Pages 1 - 16

https://doi.org/10.1145/2000502.2000505

Published: 01 August 2011 Publication History

Abstract

Nanocrossbars (i.e., nanowire crossbars) offer extreme logic densities but come with very high defect rates; stuck-open/closed, broken nanowires. Achieving reasonable yield and utilization requires logic mapping that is defect-aware even at the crosspoint level. Such logic mapping works with a defect map per each manufactured chip. The problem can be expressed as matching of two bipartite graphs; one for the logic to be implemented and other for the nanocrossbar. This article shows that the problem becomes a Bipartite SubGraph Isomorphism (BSGI) problem within sub-nanocrossbars free of stuck-closed faults. Our heuristic KNS-2DS is an iterative rough canonizer with approximately O(N²) complexity followed by an O(N³) matching algorithm. Canonization brings a partial or full order to graph nodes. It is normally used for solving the regular Graph Isomorphism (GI) problem, while we apply it to BSGI. KNS stands for K-Neighbor Sort and is used for initializing our main contribution 2-Dimensional-Sort (2DS). 2DS operates on the adjacency matrix of a bipartite graph. Radix-2 2DS solves the problem in the absence of stuck-closed faults. With the addition of Radix-3 and our novel Radix-2.5 sort, we solve problems that also have stuck-closed faults. We offer very short runtimes (due to canonization) compared to previous work and have success on all benchmarks. KNS-2DS is also novel from the perspective of BSGI problem as it is based on canonization but not on a search tree with backtracking.

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Cited By

Tunali OAltun M(2019)A Fast Logic Mapping Algorithm for Multiple-Type-Defect Tolerance in Reconfigurable Nano-Crossbar ArraysIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2017.27554587:4(518-529)Online publication date: 1-Oct-2019
https://doi.org/10.1109/TETC.2017.2755458
Sasikumar DKumar A(2018)A Novel Defect Tolerance Scheme for Nanocrossbar Architectures with Enhanced EfficiencyMicromachines10.3390/mi1001001410:1(14)Online publication date: 27-Dec-2018
https://doi.org/10.3390/mi10010014
Kule MRahaman HBhattacharya B(2018)Maximal Defect-Free Component in Nanoscale Crossbar Circuits Amidst Stuck-Open and Stuck-Closed FaultsJournal of Circuits, Systems and Computers10.1142/S0218126619501809Online publication date: 24-Oct-2018
https://doi.org/10.1142/S0218126619501809
Show More Cited By

Index Terms

Defect-Aware Nanocrossbar Logic Mapping through Matrix Canonization Using Two-Dimensional Radix Sort
1. Hardware
  1. Hardware test
  2. Robustness

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 7, Issue 3

August 2011

69 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/2000502

Issue’s Table of Contents

Copyright © 2011 ACM.

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 August 2011

Accepted: 01 December 2010

Revised: 01 October 2010

Received: 01 June 2010

Published in JETC Volume 7, Issue 3

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Cited By

Tunali OAltun M(2019)A Fast Logic Mapping Algorithm for Multiple-Type-Defect Tolerance in Reconfigurable Nano-Crossbar ArraysIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2017.27554587:4(518-529)Online publication date: 1-Oct-2019
https://doi.org/10.1109/TETC.2017.2755458
Sasikumar DKumar A(2018)A Novel Defect Tolerance Scheme for Nanocrossbar Architectures with Enhanced EfficiencyMicromachines10.3390/mi1001001410:1(14)Online publication date: 27-Dec-2018
https://doi.org/10.3390/mi10010014
Kule MRahaman HBhattacharya B(2018)Maximal Defect-Free Component in Nanoscale Crossbar Circuits Amidst Stuck-Open and Stuck-Closed FaultsJournal of Circuits, Systems and Computers10.1142/S0218126619501809Online publication date: 24-Oct-2018
https://doi.org/10.1142/S0218126619501809
Chen DXia YWang Z(2018)Stuck-at-close defect propagation and its blocking technique in CMOL cell mappingMicroelectronics Journal10.1016/j.mejo.2017.12.00472(100-108)Online publication date: Feb-2018
https://doi.org/10.1016/j.mejo.2017.12.004
Tunali OAltun M(2017)A Survey of Fault-Tolerance Algorithms for Reconfigurable Nano-Crossbar ArraysACM Computing Surveys10.1145/312564150:6(1-35)Online publication date: 14-Nov-2017
https://dl.acm.org/doi/10.1145/3125641
Tunali OAltun M(2017)Permanent and Transient Fault Tolerance for Reconfigurable Nano-Crossbar ArraysIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.260280436:5(747-760)Online publication date: 1-May-2017
https://dl.acm.org/doi/10.1109/TCAD.2016.2602804
Yuan BLi BChen HYao X(2016)Defect- and Variation-Tolerant Logic Mapping in Nanocrossbar Using Bipartite Matching and Memetic AlgorithmIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.253089824:9(2813-2826)Online publication date: Sep-2016
https://doi.org/10.1109/TVLSI.2016.2530898
Al-Mutairi HAhmad I(2015)A hybrid mapping algorithm for reconfigurable nanoarchitecturesJournal of Engineering Research10.7603/s40632-015-0004-93:1Online publication date: 24-Apr-2015
https://doi.org/10.7603/s40632-015-0004-9
Velasquez AJha S(2015)Fault-tolerant in-memory crossbar computing using quantified constraint solvingProceedings of the 2015 33rd IEEE International Conference on Computer Design (ICCD)10.1109/ICCD.2015.7357090(101-108)Online publication date: 18-Oct-2015
https://dl.acm.org/doi/10.1109/ICCD.2015.7357090
Yuan BLi B(2014)A Fast Extraction Algorithm for Defect-Free Subcrossbar in Nanoelectronic CrossbarACM Journal on Emerging Technologies in Computing Systems10.1145/251713710:3(1-19)Online publication date: 6-May-2014
https://dl.acm.org/doi/10.1145/2517137
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