research-article

A case for unlimited watchpoints

Authors:

Joseph L. Greathouse,

Todd AustinAuthors Info & Claims

ASPLOS XVII: Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems

Pages 159 - 172

https://doi.org/10.1145/2150976.2150994

Published: 03 March 2012 Publication History

Abstract

Numerous tools have been proposed to help developers fix software errors and inefficiencies. Widely-used techniques such as memory checking suffer from overheads that limit their use to pre-deployment testing, while more advanced systems have such severe performance impacts that they may require special-purpose hardware. Previous works have described hardware that can accelerate individual analyses, but such specialization stymies adoption; generalized mechanisms are more likely to be added to commercial processors. This paper demonstrates that the ability to set an unlimited number of fine-grain data watchpoints can reduce the runtime overheads of numerous dynamic software analysis techniques. We detail the watchpoint capabilities required to accelerate these analyses while remaining general enough to be useful in the future. We describe a hardware design that stores watchpoints in main memory and utilizes two different on-chip caches to accelerate performance. The first is a bitmap lookaside buffer that stores fine-grained watchpoints, while the second is a range cache that can efficiently hold large contiguous regions of watchpoints. As an example of the power of such a system, it is possible to use watchpoints to accelerate read/write set checks in a software data race detector by nearly 9x.

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A case for unlimited watchpoints

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cover image ACM Conferences

ASPLOS XVII: Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems

March 2012

476 pages

ISBN:9781450307598

DOI:10.1145/2150976

General Chair:
Tim Harris
Microsoft Research
,
Program Chair:
Michael L. Scott
University of Rochester

ACM SIGARCH Computer Architecture News Volume 40, Issue 1
ASPLOS '12
March 2012
453 pages
ISSN:0163-5964
DOI:10.1145/2189750
Issue’s Table of Contents
ACM SIGPLAN Notices Volume 47, Issue 4
ASPLOS '12
April 2012
453 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/2248487
Issue’s Table of Contents

Copyright © 2012 ACM.

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Published: 03 March 2012

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Delshadtehrani LCanakci SZhou BEldridge SJoshi AEgele MCapkun SRoesner F(2020)PHMonProceedings of the 29th USENIX Conference on Security Symposium10.5555/3489212.3489258(807-824)Online publication date: 12-Aug-2020
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Christou GVasiliadis GPapaefstathiou VPapadogiannakis AIoannidis S(2020)On Architectural Support for Instruction Set RandomizationACM Transactions on Architecture and Code Optimization10.1145/341984117:4(1-26)Online publication date: 10-Nov-2020
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