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Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors

Published: 23 April 1995 Publication History
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References

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A. P. Chandrakasan, S. Sheng, R. W. Broderson, "Low-Power CMOS Digital Design," IEEE Journal of Solid State Electronics, Vol. 27, pp. 473-484, 1992.
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M. Holler, S. Tam, H. Castro, and R. Benson, "An Electrically Trainable Neural Network Chip (ETANN) with 1024 'Floating Gate' Synapses," in Proc. IJCNN, June 1989, pp 2.191-2.196.
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A. Kramer, V. Hu, C. K. Sin, B. Gupta, R. Chu, and P. K. Ko, "EEPROM Device as a Reconfigurable Analog Element for Neural Networks," IEDM Tech. Dig., pp. 10.3.1-10.3.4, Dec., 1989
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A. Kramer, C. K. Sin, R. Chu, and P. K. Ko, "Compact EEPROM-based Weight Functions," in Neural Information Processing Systems 3, R. P. Lippmann, J. E. Moody, and D. S. Touretzky, Eds., San Mateo CA: Morgan Kaufmann Publishers, Inc., 1991, p. 1001 - 1007.
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J. P. Wade and C. G. Sodini, "A Ternary Content Addressable Search Engine," IEEE Journal of Solid State Circuits, 1989, pp. 1003 - 1013.
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M. Degrauwe, E. Vittoz and I. Verbaouwhede, "A Micropower CMOS- Instrumentation Amplifier," IEEE Journal of Solid State Circuits, vol. SC-20, 1985, pp.805 - 807.
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A. Kramer et. al. "Flash-Based Programmable Nonlinear Capacitor for Switched-Capacitor Implementations of Neural Networks," IEDM Tech. Dig., pp. 17.6.1-17.6.4, Dec., 1994.
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Lazzaro, J., Ryckenbusch, S., Mahowald, M. A., and Mead, C. (1988). .Winner-take-all-networks of O(n) complexity. In Tourestzky,D. (ed), Advances in Neural Network Information Processing Systems 1. San Mateo, CA: Morgan Kaufmann Publishers, pp. 703-711

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  • (1999)An analog associative memory chip for VQ image compressionProceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 0410.1109/ICASSP.1999.758311(1965-1968)Online publication date: 15-Mar-1999
  • (1996)Array-based analog computation: principles, advantages and limitationsProceedings of Fifth International Conference on Microelectronics for Neural Networks10.1109/MNNFS.1996.493774(68-79)Online publication date: 1996
  • (1996)Array-Based Analog ComputationIEEE Micro10.1109/40.54007716:5(20-29)Online publication date: 1-Oct-1996

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cover image ACM Conferences
ISLPED '95: Proceedings of the 1995 international symposium on Low power design
April 1995
233 pages
ISBN:0897917448
DOI:10.1145/224081
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 23 April 1995

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LPD95
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LPD95: Low Power Design Symposium
April 23 - 26, 1995
California, Dana Point, USA

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Cited By

View all
  • (1999)An analog associative memory chip for VQ image compressionProceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 0410.1109/ICASSP.1999.758311(1965-1968)Online publication date: 15-Mar-1999
  • (1996)Array-based analog computation: principles, advantages and limitationsProceedings of Fifth International Conference on Microelectronics for Neural Networks10.1109/MNNFS.1996.493774(68-79)Online publication date: 1996
  • (1996)Array-Based Analog ComputationIEEE Micro10.1109/40.54007716:5(20-29)Online publication date: 1-Oct-1996

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