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Optimal tile size adjustment in compiling general DOACROSS loop nests

Published: 03 July 1995 Publication History
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References

[1]
High Performance Fortran Forum, High Performance Fortran Language Specitication, 1993.
[2]
U. Banerjee, Dependence Analysis for Supercomputing, Kluwer Academic, 1986.
[3]
M. Wolfe, 'More Iteration Space Tilingf Supercomputing '89, pp. 655-664.
[4]
M. Wolfe, Optimizing Supercompilers for $upercomputing, Pitman, 1989.
[5]
H. Zima, Supercompilers for Parallel and Vector compu ters, ACM Press, 1991.
[6]
R. Irigoin and R. Triolet, "Supernode Partioning,' A CM Syrup. on Principles of Programm/ng Languages, pp. 319-329, 1988.
[7]
C. Ancourt and R. Irigoin. "Scanning Polyhedra with DO Loopsf 3rd A CM Syrup. on Principles and Practice of Paralle/Programming, pp. 39-50, 1991.
[8]
M. E. Wolf and M. S. Lain, "A Loop Transformation Theory and an Algorithm to Maximize Parallelism,~ IEEE Trans. on Parallel and Distributed Systems, Vol. 2, pp. 452-471, 1991.
[9]
M. E. Wolf and M. S. Lain, "A Data Locality Optimizing Algorithm,' A CM SIGPLAN '91 Coal on Programming Language Design and Implementation, pp. 30-44, 1991.
[10]
J. Ramanujam and P. Saday~ppan, "Tiling Multidimensional Iteration Spaces for Multicomputers,' J. of Paralld and Distributed Computing, Vol. 16, pp. 108- 120, 1992.
[11]
S. Hiranandani, K. Kennedy, and C.-W. Tseng, "Evaluating Compiler Optimizations for Fortran D,' J. of Parallel and Distributed Computing, Vol. 21, pp. 27- 45, 1994.
[12]
A. Rogers and K. Pingali, "Compiling for Distributed Memory Architectures,' IEEE Trans. oa Para//e/and Distributed Systems, Vol. 5, pp. 281-298~ 1994.
[13]
P. Tang and J. N. Zigman, "Redudng Data Communication Overhead for DOACROSS Loop Nests," 1994 ACM Intq Conf. on $upercomputing, pp. 44-53, 1994.
[14]
E. Montagne, M. Rukoz, R. Suros, and F. Breant, "Modeling Optimal Granularity When AdaLpting Systolic Algorithms to Transputer Based Supercomputers,' Paxa//e/Computing, Vol. 20, pp. 807-614, 1994.

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  • (2019)Exploiting Task-based Parallelism in Application Loops2019 8th Mediterranean Conference on Embedded Computing (MECO)10.1109/MECO.2019.8760146(1-5)Online publication date: Jun-2019
  • (2017)Supernode transformation on computer clusters2017 10th International Conference on Ubi-media Computing and Workshops (Ubi-Media)10.1109/UMEDIA.2017.8074109(1-6)Online publication date: Aug-2017
  • (2017)Supernode transformation on GPGPUsInternational Journal of Parallel, Emergent and Distributed Systems10.1080/17445760.2017.129614734:2(181-202)Online publication date: 16-Mar-2017
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cover image ACM Conferences
ICS '95: Proceedings of the 9th international conference on Supercomputing
July 1995
448 pages
ISBN:0897917286
DOI:10.1145/224538
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 03 July 1995

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  • Univ Politecnica del Catalunya
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  • Oregon Graduate Institute

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ICS '95 Paper Acceptance Rate 49 of 120 submissions, 41%;
Overall Acceptance Rate 629 of 2,180 submissions, 29%

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Cited By

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  • (2019)Exploiting Task-based Parallelism in Application Loops2019 8th Mediterranean Conference on Embedded Computing (MECO)10.1109/MECO.2019.8760146(1-5)Online publication date: Jun-2019
  • (2017)Supernode transformation on computer clusters2017 10th International Conference on Ubi-media Computing and Workshops (Ubi-Media)10.1109/UMEDIA.2017.8074109(1-6)Online publication date: Aug-2017
  • (2017)Supernode transformation on GPGPUsInternational Journal of Parallel, Emergent and Distributed Systems10.1080/17445760.2017.129614734:2(181-202)Online publication date: 16-Mar-2017
  • (2015)Optimal Parallelogram Selection for Hierarchical TilingACM Transactions on Architecture and Code Optimization10.1145/268741411:4(1-23)Online publication date: 9-Jan-2015
  • (2011)Tiling optimization for the solution of two-dimensional time-dependent heat equationComputational Mathematics and Mathematical Physics10.1134/S096554251104002651:4(586-596)Online publication date: 1-May-2011
  • (2010)Algorithmic issues in grid computingAlgorithms and theory of computation handbook10.5555/1882723.1882752(29-29)Online publication date: 1-Jan-2010
  • (2010)Tiling optimization in numerically solving a multidimensional heat equation on a ring of processorsCybernetics and Systems Analysis10.1007/s10559-010-9193-246:1(145-152)Online publication date: 1-Jan-2010
  • (2009)Computations on Iteration SpacesThe Compiler Design Handbook10.1201/9781420043839.ch15(15-1-15-52)Online publication date: 7-Dec-2009
  • (2009)Communication-Aware Supernode ShapeIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2008.11420:4(498-511)Online publication date: 1-Apr-2009
  • (2008)Positivity, posynomials and tile size selectionProceedings of the 2008 ACM/IEEE conference on Supercomputing10.5555/1413370.1413426(1-12)Online publication date: 15-Nov-2008
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