research-article

Identifying optimal multicore cache hierarchies for loop-based parallel programs via reuse distance analysis

Authors:

Donald YeungAuthors Info & Claims

MSPC '12: Proceedings of the 2012 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness

Pages 2 - 11

https://doi.org/10.1145/2247684.2247687

Published: 16 June 2012 Publication History

Abstract

Understanding multicore memory behavior is crucial, but can be challenging due to the complex cache hierarchies employed in modern CPUs. In today's hierarchies, performance is determined by complicated thread interactions, such as interference in shared caches and replication and communication in private caches. Researchers normally perform extensive simulations to study these interactions, but this can be costly and not very insightful. An alternative is multicore reuse distance (RD) analysis, which can provide extremely rich information about multicore memory behavior. In this paper, we apply multicore RD analysis to better understand cache system design. We focus on loop-based parallel programs, an important class of programs for which RD analysis provides high accuracy. We propose a novel framework to identify optimal multicore cache hierarchies, and extract several new insights. We also characterize how the optimal cache hierarchies vary with core count and problem size.

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Cited By

Breiter SWeidendorfer JChung MFürlinger K(2023)A Profiling-Based Approach to Cache Partitioning of Program DataParallel and Distributed Computing, Applications and Technologies10.1007/978-3-031-29927-8_35(453-463)Online publication date: 8-Apr-2023
https://doi.org/10.1007/978-3-031-29927-8_35
Barai AArafa YBadawy AChennupati GSanthi NEidenbenz S(2021)PPT-Multicore: performance prediction of OpenMP applications using reuse profiles and analytical modelingThe Journal of Supercomputing10.1007/s11227-021-03949-4Online publication date: 28-Jun-2021
https://doi.org/10.1007/s11227-021-03949-4
Wang QLiu XChabbi M(2019)Featherlight Reuse-Distance Measurement2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2019.00056(440-453)Online publication date: Feb-2019
https://doi.org/10.1109/HPCA.2019.00056
Show More Cited By

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Identifying optimal multicore cache hierarchies for loop-based parallel programs via reuse distance analysis

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cover image ACM Conferences

MSPC '12: Proceedings of the 2012 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness

June 2012

82 pages

ISBN:9781450312196

DOI:10.1145/2247684

General Chair:
Lixin Zhang
ICT, Chinese Academy of Sciences
,
Program Chair:
Onur Mutlu
Carnegie Mellon University

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGPLAN: ACM Special Interest Group on Programming Languages

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 16 June 2012

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PLDI '12

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SIGPLAN

PLDI '12: ACM SIGPLAN Conference on Programming Language Design and Implementation

June 16, 2012

Beijing, China

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Overall Acceptance Rate 6 of 20 submissions, 30%

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Cited By

Breiter SWeidendorfer JChung MFürlinger K(2023)A Profiling-Based Approach to Cache Partitioning of Program DataParallel and Distributed Computing, Applications and Technologies10.1007/978-3-031-29927-8_35(453-463)Online publication date: 8-Apr-2023
https://doi.org/10.1007/978-3-031-29927-8_35
Barai AArafa YBadawy AChennupati GSanthi NEidenbenz S(2021)PPT-Multicore: performance prediction of OpenMP applications using reuse profiles and analytical modelingThe Journal of Supercomputing10.1007/s11227-021-03949-4Online publication date: 28-Jun-2021
https://doi.org/10.1007/s11227-021-03949-4
Wang QLiu XChabbi M(2019)Featherlight Reuse-Distance Measurement2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2019.00056(440-453)Online publication date: Feb-2019
https://doi.org/10.1109/HPCA.2019.00056
Kiani MRajabzadeh A(2018)Efficient Cache Performance Modeling in GPUs Using Reuse Distance AnalysisACM Transactions on Architecture and Code Optimization10.1145/329105115:4(1-24)Online publication date: 19-Dec-2018
https://dl.acm.org/doi/10.1145/3291051
Badawy AYeung D(2017)Optimizing locality in graph computations using reuse distance profiles2017 IEEE 36th International Performance Computing and Communications Conference (IPCCC)10.1109/PCCC.2017.8280444(1-8)Online publication date: Dec-2017
https://doi.org/10.1109/PCCC.2017.8280444
Badawy AYeung D(2017)Guiding Locality Optimizations for Graph Computations via Reuse Distance AnalysisIEEE Computer Architecture Letters10.1109/LCA.2017.269517816:2(119-122)Online publication date: 1-Jul-2017
https://doi.org/10.1109/LCA.2017.2695178
Badawy AYessin GNarayana VMayhew DEl‐Ghazawi T(2017)Optimizing thin client caches for mobile cloud computing:Concurrency and Computation: Practice and Experience10.1002/cpe.404829:11Online publication date: 3-Mar-2017
https://doi.org/10.1002/cpe.4048
Badamo MCasarona JZhao MYeung D(2016)Identifying Power-Efficient Multicore Cache Hierarchies via Reuse Distance AnalysisACM Transactions on Computer Systems10.1145/285150334:1(1-30)Online publication date: 6-Apr-2016
https://dl.acm.org/doi/10.1145/2851503
Naderan-Tahan MSarbazi-Azad H(2015)Why Does Data Prefetching Not Work for Modern Workloads?The Computer Journal10.1093/comjnl/bxv11259:2(244-259)Online publication date: 23-Dec-2015
https://doi.org/10.1093/comjnl/bxv112
Yessin GBadawy ANarayana VMayhew DGhazawi T(2014)"CERE"Proceedings of the 2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security, 2014 IEEE 11th Intl Conf on Embedded Software and Syst (HPCC,CSS,ICESS)10.1109/HPCC.2014.97(566-573)Online publication date: 20-Aug-2014
https://dl.acm.org/doi/10.1109/HPCC.2014.97
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