Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
10.1145/2367589.2367599acmotherconferencesArticle/Chapter ViewAbstractPublication PagessystorConference Proceedingsconference-collections
research-article

Optimizing indirect branches in a system-level dynamic binary translator

Published: 04 June 2012 Publication History

Abstract

A dynamic binary translator (DBT) is a runtime system that translates binary code on the fly, for example to emulate the execution of the binary code on a processor with a different instruction set. One of the major sources of the overhead is the resolution of the branch target addresses for indirect branch instructions. Previous work has addressed this problem for a single virtual address space, but none has addressed it for multiple virtual address spaces in the context of the system-level DBT. This is challenging for compiler optimizations because the compiler cannot compute the virtual addresses of the branch targets for indirect branches at compile-time since they are affected by the runtime states of the emulated TLB. In this paper, we propose a new compiler optimization technique to address the problem for a system-level DBT. Our key idea is to use an offset from the virtual address of each page that contains a branch instruction, since this offset is not affected by the emulated TLB. We found that the compiler can often compute the offset using compile-time constants and that this approach significantly simplifies the guard code necessary for an indirect branch. We implemented this technique in a compiler of a system-level DBT for the z/Architecture. Our experimental results showed our technique can reduce the execution times of the CBW2 benchmarks, part of the standard LSPR benchmark, by up to 5.9% and 2.5% on average. Our analysis indicated that our technique was able to optimize 3.8% of the total dynamic instructions in the original binary code, while completely removing the guard code for 98.9% of these indirect branches.

References

[1]
C. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser, G. Lowney, S. Wallace, V. J. Reddi, and K. Hazelwood, "Pin: Building Customized Program Analysis Tools with Dynamic Instrumentation", in Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, pp. 190--200, 2005.
[2]
C. May, "MIMIC: A Fast System/370 Simulator", in the Proceedings of the ACM SIGPLAN Symposium on Interpreters and Interpretive Techniques, pp. 1--13, 1987.
[3]
D. Hiniker, K. Hazelwood, and M. D. Smith, "Improving Region Selection in Dynamic Optimization Systems", in Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture, pp. 141--154, 2005.
[4]
H. Penner and U. Weigand, "Porting GCC to the IBM S/390 Platform", in Proceedings of the GCC Developer's Summit, pp. 195--213, 2003.
[5]
IBM, "Large Systems Performance Reference for IBM System z".
[6]
IBM, "z/Architecture Principles of Operation".
[7]
J. D. Hiser, D. Williams, W. Hu, J. W. Davidson, J. Mars, and B. R. Childers, "Evaluating Indirect Branch Handling Mechanisms in Software Dynamic Translation Systems", in Proceedings of the International Symposium on Code Generation and Optimization, pp. 61--73, 2007.
[8]
K. Ebcioglu and E. R. Altman, "DAISY: Dynamic Compilation for 100% Architectural Compatibility", in Proceedings of the 24th Annual International Symposium on Computer Architecture, pp. 26--37, 1997.
[9]
K. Ebcioglu, E. R. Altman, S. W. Sathaye, and M. Gschwind, "Execution-based Scheduling for VLIW Architectures", in Proceedings of the 5th International Euro-Par Conference on Parallel Processing, pp. 1269--1280, 1999.
[10]
K. Scott, N. Kumar, S. Velusamy, B. Childers, J. W. Davidson, and M. L. Soffa, "Retargetable and Reconfigurable Software Dynamic Translation", in Proceedings of the International Symposium on Code Generation and Optimization, pp. 36--47, 2003.
[11]
M. Gschwind, K. Ebcioglu, E. Altman, and S. Sathaye, "Binary Translation and Architecture Convergence Issues for IBM System/390", in Proceedings of the 14th International Conference on Supercomputing, pp. 336--347, 2000.
[12]
N. Nethercote and J. Seward, "Valgrind: a Framework for Heavyweight Dynamic Binary Instrumentation", in Proceedings of the 2007 ACM SIGPLAN Conference on Programming Language Design and Implementation, pp. 89--100, 2007
[13]
P. P. Bungale and C Luk, "PinOS: A Programmable Framework for Whole-system Dynamic Instrumentation", in Proceedings of the 3rd International Conference on Virtual Execution Environment, pp. 137--147, 2007.
[14]
S. Sridhar, J. S. Shapiro, E. Northup, and P. P. Bungale, "HDTrans: an Open Source, Low-level Dynamic Instrumentation System", in Proceedings of the 2nd International Conference on Virtual Execution Environments, pp. 175--185, 2006.
[15]
T. Koju, S. Takada, and N. Doi, "an Efficient and Generic Reversible Debugger using the Virtual Machine base Approach", in Proceedings of the 1st International Conference on Virtual Execution Environments, pp. 79--88, 2005.
[16]
V. Bala, E. Duesterwald, and S. Banerjia, "Dynamo: A Transparent Dynamic Optimization System", in Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, pp. 1--12, 2000.

Cited By

View all
  • (2017)SimBench: A portable benchmarking methodology for full-system simulators2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS.2017.7975293(217-226)Online publication date: Apr-2017
  • (2015)Bungee jumpsProceedings of the 48th International Symposium on Microarchitecture10.1145/2830772.2830781(370-382)Online publication date: 5-Dec-2015
  • (2015)Establishing Operational Models for Dynamic Compilation in a Simulation PlatformNature of Computation and Communication10.1007/978-3-319-15392-6_12(117-131)Online publication date: 24-Jan-2015
  • Show More Cited By

Index Terms

  1. Optimizing indirect branches in a system-level dynamic binary translator

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Other conferences
    SYSTOR '12: Proceedings of the 5th Annual International Systems and Storage Conference
    June 2012
    183 pages
    ISBN:9781450314480
    DOI:10.1145/2367589
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    • The Technion - Israel Institute of Techn.: The Technion - Israel Institute of Technology

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 04 June 2012

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. dynamic binary translation
    2. indirect branch

    Qualifiers

    • Research-article

    Conference

    SYSTOR '12
    Sponsor:
    • The Technion - Israel Institute of Techn.

    Acceptance Rates

    Overall Acceptance Rate 108 of 323 submissions, 33%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)3
    • Downloads (Last 6 weeks)0
    Reflects downloads up to 15 Oct 2024

    Other Metrics

    Citations

    Cited By

    View all
    • (2017)SimBench: A portable benchmarking methodology for full-system simulators2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS.2017.7975293(217-226)Online publication date: Apr-2017
    • (2015)Bungee jumpsProceedings of the 48th International Symposium on Microarchitecture10.1145/2830772.2830781(370-382)Online publication date: 5-Dec-2015
    • (2015)Establishing Operational Models for Dynamic Compilation in a Simulation PlatformNature of Computation and Communication10.1007/978-3-319-15392-6_12(117-131)Online publication date: 24-Jan-2015
    • (2014)Efficient code generation in a region-based dynamic binary translatorACM SIGPLAN Notices10.1145/2666357.259781049:5(3-12)Online publication date: 12-Jun-2014
    • (2014)SPTUProceedings of International Conference on Systems and Storage10.1145/2611354.2611368(1-12)Online publication date: 30-Jun-2014
    • (2014)DTTProceedings of the 11th ACM Conference on Computing Frontiers10.1145/2597917.2597944(1-10)Online publication date: 20-May-2014
    • (2014)Efficient code generation in a region-based dynamic binary translatorProceedings of the 2014 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems10.1145/2597809.2597810(3-12)Online publication date: 12-Jun-2014

    View Options

    Get Access

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media