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Hierarchical electromigration reliability diagnosis for VLSI interconnects

Authors:

Chin-Chi Teng,

Yi-Kan Cheng,

Elyse Rosenbaum,

Sung-Mo KangAuthors Info & Claims

DAC '96: Proceedings of the 33rd annual Design Automation Conference

Pages 752 - 757

https://doi.org/10.1145/240518.240661

Published: 01 June 1996 Publication History

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References

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Cited By

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Cheng YTodri-Sanial AYang JZhao W(2016)Alleviating Through-Silicon-Via Electromigration for 3-D Integrated Circuits Taking Advantage of Self-Healing EffectIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.254326024:11(3310-3322)Online publication date: 1-Nov-2016
https://dl.acm.org/doi/10.1109/TVLSI.2016.2543260
Krishnamoorthy SVenkatraman VApanovich YBurd TDaga A(2011)Switching constraint-driven thermal and reliability analysis of Nanometer designs2011 12th International Symposium on Quality Electronic Design10.1109/ISQED.2011.5770770(1-8)Online publication date: Mar-2011
https://doi.org/10.1109/ISQED.2011.5770770
Krishnamoorthy SVenkatraman VApanovich YBurd TDaga A(2010)Thermal-aware reliability analysis of nanometer designs19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems10.1109/EPEPS.2010.5642793(277-280)Online publication date: Oct-2010
https://doi.org/10.1109/EPEPS.2010.5642793
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Index Terms

Hierarchical electromigration reliability diagnosis for VLSI interconnects
1. Applied computing
  1. Physical sciences and engineering
2. Hardware
  1. Hardware test
  2. Robustness
    1. Hardware reliability

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Published In

DAC '96: Proceedings of the 33rd annual Design Automation Conference

June 1996

839 pages

ISBN:0897917790

DOI:10.1145/240518

Chairmen:
Thomas P. Pennino
Bell Labs, Holmdel, NJ
,
Ellen J. Yoffa
IBM Corp., Yorktown Heights, NY

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 June 1996

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DAC96: The 33rd Design Automation Conference

June 3 - 7, 1996

Nevada, Las Vegas, USA

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DAC '96 Paper Acceptance Rate 142 of 377 submissions, 38%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cheng YTodri-Sanial AYang JZhao W(2016)Alleviating Through-Silicon-Via Electromigration for 3-D Integrated Circuits Taking Advantage of Self-Healing EffectIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.254326024:11(3310-3322)Online publication date: 1-Nov-2016
https://dl.acm.org/doi/10.1109/TVLSI.2016.2543260
Krishnamoorthy SVenkatraman VApanovich YBurd TDaga A(2011)Switching constraint-driven thermal and reliability analysis of Nanometer designs2011 12th International Symposium on Quality Electronic Design10.1109/ISQED.2011.5770770(1-8)Online publication date: Mar-2011
https://doi.org/10.1109/ISQED.2011.5770770
Krishnamoorthy SVenkatraman VApanovich YBurd TDaga A(2010)Thermal-aware reliability analysis of nanometer designs19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems10.1109/EPEPS.2010.5642793(277-280)Online publication date: Oct-2010
https://doi.org/10.1109/EPEPS.2010.5642793
Chrzanowska-Jeske M(2003)Tutorial - reliability enhancement for high-performance circuits in deep sub-micron era2003 46th Midwest Symposium on Circuits and Systems10.1109/MWSCAS.2003.1562574(1474-1477)Online publication date: 2003
https://doi.org/10.1109/MWSCAS.2003.1562574
(2002)Temperature-dependent Electromigration ReliabilityElectrothermal Analysis of VLSI Systems10.1007/0-306-47024-1_6(121-155)Online publication date: 2002
https://doi.org/10.1007/0-306-47024-1_6
Basaran BGanesh KLau RLevin AMcCoo MRangarajan SSehgal N(1999)GeneSys: a leaf-cell layout synthesis system for GHz VLSI designsProceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)10.1109/ICVD.1999.745196(448-452)Online publication date: 1999
https://doi.org/10.1109/ICVD.1999.745196

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Optimization of throughput performance for low-power VLSI interconnects

Impact of increased resistive losses of metal interconnects upon ULSI devices reliability and functionality

Computational simulation of electromigration induced damage in copper interconnects

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Optimization of throughput performance for low-power VLSI interconnects

Impact of increased resistive losses of metal interconnects upon ULSI devices reliability and functionality

Computational simulation of electromigration induced damage in copper interconnects

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