research-article

Effect of Wordline/Bitline Scaling on the Performance, Energy Consumption, and Reliability of Cross-Point Memory Array

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H.-S. Philip WongAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 9, Issue 1

Article No.: 9, Pages 1 - 14

https://doi.org/10.1145/2422094.2422103

Published: 01 February 2013 Publication History

Abstract

The impact of wordline/bitline metal wire scaling on the write/read performance, energy consumption, speed, and reliability of the cross-point memory array is quantitatively studied for technology nodes down to single-digit nm. The impending resistivity increase in the Cu wires is found to cause significant decrease of both write and read window margins at the regime when electron surface scattering and grain boundary scattering are substantial. At deeply-scaled device dimensions, the wire energy dissipation and wire latency become comparable to or even exceed the intrinsic values of memory cells. The large current density flowing through the wordlines/bitlines raises additional reliability concerns for the cross-point memory array. All these issues are exacerbated at smaller memory resistance values and larger memory array sizes. They thereby impose strict constraints on the memory device design and preclude the realization of large-scale cross-point memory array with minimum feature sizes beyond the 10 nm node. A rethink in the design methodology of cross-point memory to incorporate and mitigate the scaling effects of wordline/bitline is necessary. Possible solutions include the use of memory wires with better conductivity and scalability, memory arrays with smaller partition sizes, and memory elements with larger resistance values and resistance ratios.

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Index Terms

Effect of Wordline/Bitline Scaling on the Performance, Energy Consumption, and Reliability of Cross-Point Memory Array
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 9, Issue 1

February 2013

181 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/2422094

Issue’s Table of Contents

Copyright © 2013 ACM.

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 February 2013

Accepted: 01 August 2012

Revised: 01 July 2012

Received: 01 July 2011

Published in JETC Volume 9, Issue 1

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Yu EK GSaxena URoy K(2024)Ferroelectric capacitors and field-effect transistors as in-memory computing elements for machine learning workloadsScientific Reports10.1038/s41598-024-59298-814:1Online publication date: 24-Apr-2024
https://doi.org/10.1038/s41598-024-59298-8
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