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APPLE: adaptive performance-predictable low-energy caches for reliable hybrid voltage operation

Published: 29 May 2013 Publication History

Abstract

Semiconductor technology evolution enables the design of resource-constrained battery-powered ultra-low-cost chips required for new market segments such as environment, urban life and body monitoring. Caches have been shown to be the main energy and area consumer in those chips.
This paper proposes simple, hybrid-operation (high Vcc, ultra-low Vcc), single-Vcc domain Adaptive Performance-Predictable Low-Energy (APPLE) L1 cache designs based on replacing energy-hungry SRAM cells by more energy-efficient and smaller cells enhanced with extra cache lines set up in an adapted victim cache to still enable strong performance guarantees. APPLE caches are proven to largely outperform existing solutions in terms of energy and area efficiency.

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Cited By

View all
  • (2016)Exploring Variation-Aware Fault-Tolerant Cache under Near-Threshold Computing2016 45th International Conference on Parallel Processing (ICPP)10.1109/ICPP.2016.24(149-158)Online publication date: Aug-2016
  • (2015)A Survey of Architectural Techniques for Near-Threshold ComputingACM Journal on Emerging Technologies in Computing Systems10.1145/282151012:4(1-26)Online publication date: 28-Dec-2015
  • (2015)iPatch: Intelligent fault patching to improve energy efficiency2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2015.7056052(428-438)Online publication date: Feb-2015
  • Show More Cited By

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        cover image ACM Conferences
        DAC '13: Proceedings of the 50th Annual Design Automation Conference
        May 2013
        1285 pages
        ISBN:9781450320719
        DOI:10.1145/2463209
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Published: 29 May 2013

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        Author Tags

        1. cache
        2. faults
        3. low energy
        4. predictable performance

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        View all
        • (2016)Exploring Variation-Aware Fault-Tolerant Cache under Near-Threshold Computing2016 45th International Conference on Parallel Processing (ICPP)10.1109/ICPP.2016.24(149-158)Online publication date: Aug-2016
        • (2015)A Survey of Architectural Techniques for Near-Threshold ComputingACM Journal on Emerging Technologies in Computing Systems10.1145/282151012:4(1-26)Online publication date: 28-Dec-2015
        • (2015)iPatch: Intelligent fault patching to improve energy efficiency2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2015.7056052(428-438)Online publication date: Feb-2015
        • (2014)NUCA-L1ACM Transactions on Architecture and Code Optimization10.1145/263191811:3(1-28)Online publication date: 27-Oct-2014

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