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View all- Li ZLiu LDeng YYin SWei S(2018)Breaking the Synchronization Bottleneck with Reconfigurable Transactional ExecutionIEEE Computer Architecture Letters10.1109/LCA.2018.282840217:2(147-150)Online publication date: 1-Jul-2018
- Wingbermuehle JCytron RChamberlain RConstantinides GChen D(2015)Superoptimized Memory Subsystems for Streaming ApplicationsProceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays10.1145/2684746.2689069(126-135)Online publication date: 22-Feb-2015