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DAPs: Dynamic Adjustment and Partial Sampling for Multithreaded/Multicore Simulation

Published: 01 June 2014 Publication History
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    Faced with increasingly large multicore chip designs, architects need fast and accurate simulations for their exploration of design spaces within a limited simulation time budget. In multithreaded applications, threads cannot run simultaneously. Sampling is commonly used to reduce simulation time, but conventional sampling barely detects the instantaneous program variations of synchronization events and the inconsistency between phases of each core. This work proposes a dynamic adjustment and partial sampling technique (DAPs), consisting of aggressive sampling, lazy sampling, and regular sampling, to overcome thread interference in multithreaded applications. Moreover, DAPs partially selects sampling cores to reduce the overhead of sampling inconsistent phases.

    References

    [1]
    E. Argollo et al., "COTSon: Infrastructure for System-Level Simulation," Operating Systems Review, vol. 43, pp. 52--61, 2009.
    [2]
    A. Falcon et al., "Combining Simulation and Virtualization through Dynamic Sampling," in Proc. ISPASS, 2007, pp. 72--83.
    [3]
    Z. Fang et al., "Transformer: a functional-driven cycle-accurate multicore simulator," in Proc. DAC, 2012, pp. 106--114.
    [4]
    F. Bellard, "QEMU, a fast and portable dynamic translator," in Proc. USENIX Annual Technical Conference, 2005, pp. 41--41.
    [5]
    M. M. K. Martin et al., "Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset," ACM SIGARCH Computer Architecture News, vol. 33, pp. 92--99, Nov, 2009.
    [6]
    R. E. Wunderlich, T. F. Wenisch, B. Falsafi et al., "SMARTS: accelerating microarchitecture simulation via rigorous statistical sampling," in Proc. ISCA, 2003, pp. 84--97.
    [7]
    T. F. Wenisch et al., "SimFlex: Statistical Sampling of Computer System Simulation," IEEE Micro, vol.26, pp.18--31, 2006.
    [8]
    T. Sherwood et al., "Automatically characterizing large scale program behavior," in Proc. ASPLOS, 2002, pp. 45--57.
    [9]
    T. Sherwood, S. Sair, and B. Calder, "Phase tracking and prediction," in Proc. ISCA, 2003, pp. 336--349.
    [10]
    T. E. Carlson, W. Heirman, and L. Eeckhout, "Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation," in Proc. SC, 2011, pp. 1--12.
    [11]
    T. E. Carlson, W. Heirman, and L. Eeckhout, "Sampled simulation of multi-threaded applications," in Proc. ISPASS, 2013, pp. 2--12.
    [12]
    E. K. Ardestani and J. Renau, "ESESC: A fast multicore simulator using Time-Based Sampling," in Proc. HPCA, 2013, pp. 448--459.
    [13]
    Z. Fang et al., "Improving dynamic prediction accuracy through multi-level phase analysis," in Proc. LCTES, 2012, pp. 89--98.
    [14]
    J. Lau, S. Schoenmackers, and B. Calder, "Transition Phase Classification and Prediction," in Proc. HPCA, 2005, pp. 278--289.
    [15]
    A. N. Eden and T. Mudge, "The YAGS branch prediction scheme," in Proc. MICRO, 1998, pp. 69--77.
    [16]
    G. M. Amdahl, "Validity of the single processor approach to achieving large scale computing capabilities," in Proc. AFIPS 1967 Spring Joint Computer Conference, 1967, pp. 483--485.

    Cited By

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    • (2023)Benefits of Optimistic Parallel Discrete Event Simulation for Network-on-Chip Simulation2023 IEEE/ACM 27th International Symposium on Distributed Simulation and Real Time Applications (DS-RT)10.1109/DS-RT58998.2023.00013(30-39)Online publication date: 4-Oct-2023
    • (2019)Epsim: A Scalable and Parallel Marssx86 Simulator With Exploiting Epoch-Based ExecutionIEEE Access10.1109/ACCESS.2018.28866307(4782-4794)Online publication date: 2019
    • (2017)Prophet: A Parallel Instruction-Oriented Many-Core SimulatorIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2017.270030728:10(2939-2952)Online publication date: 7-Sep-2017
    • Show More Cited By

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    1. DAPs: Dynamic Adjustment and Partial Sampling for Multithreaded/Multicore Simulation

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      cover image ACM Other conferences
      DAC '14: Proceedings of the 51st Annual Design Automation Conference
      June 2014
      1249 pages
      ISBN:9781450327305
      DOI:10.1145/2593069
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 01 June 2014

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      Author Tags

      1. Dynamic adjustment and partial sampling simulation
      2. Multithreaded/Multicore simulation

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      Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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      View all
      • (2023)Benefits of Optimistic Parallel Discrete Event Simulation for Network-on-Chip Simulation2023 IEEE/ACM 27th International Symposium on Distributed Simulation and Real Time Applications (DS-RT)10.1109/DS-RT58998.2023.00013(30-39)Online publication date: 4-Oct-2023
      • (2019)Epsim: A Scalable and Parallel Marssx86 Simulator With Exploiting Epoch-Based ExecutionIEEE Access10.1109/ACCESS.2018.28866307(4782-4794)Online publication date: 2019
      • (2017)Prophet: A Parallel Instruction-Oriented Many-Core SimulatorIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2017.270030728:10(2939-2952)Online publication date: 7-Sep-2017
      • (2016)A Loosely-Coupled Full-System Multicore Simulation FrameworkIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2015.245549927:6(1566-1578)Online publication date: 12-May-2016
      • (2015)Fast parallel application and multiprocessor design space exploration from sequential codeProceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis10.5555/2830840.2830858(163-172)Online publication date: 4-Oct-2015
      • (2015)Fast parallel application and multiprocessor design space exploration from sequential code2015 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)10.1109/CODESISSS.2015.7331379(163-172)Online publication date: Oct-2015

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