research-article

Why graphics programmers need to know about DRAM

Authors:

Erik Brunvand,

Niladrish Chatterjee,

Daniel KoptaAuthors Info & Claims

SIGGRAPH '14: ACM SIGGRAPH 2014 Courses

Article No.: 21, Pages 1 - 75

https://doi.org/10.1145/2614028.2615421

Published: 27 July 2014 Publication History

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References

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{Bigler et al. 2006} Bigler, J., Stephens, A., and Parker, S. G. 2006. Design for parallel interactive ray tracing systems. In Symposium on Interactive Ray Tracing (IRT06).

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{Boulos et al. 2007} Boulos, S., Edwards, D., Lacewell, J. D., Kniss, J., Kautz, J., Shirley, P., and Wald, I. 2007. Packet-based Whitted and Distribution Ray Tracing. In Proc. Graphics Inter-face.

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{Kopta et al. 2014} Kopta, D., Shkurko, K., Spjut, J., Brunvand, E., and Davis, A. 2014. Memory considerations for low-energy ray tracing. Computer Graphics Forum. To Appear.

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Cited By

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Vasiou EShkurko KBrunvand EYuksel C(2022)Mach-RT: A Many Chip Architecture for High Performance Ray TracingIEEE Transactions on Visualization and Computer Graphics10.1109/TVCG.2020.302104828:3(1585-1596)Online publication date: 1-Mar-2022
https://doi.org/10.1109/TVCG.2020.3021048
Green OFox JYoung JShirako JBader D(2019)Performance Impact of Memory Channels on Sparse and Irregular Algorithms2019 IEEE/ACM 9th Workshop on Irregular Applications: Architectures and Algorithms (IA3)10.1109/IA349570.2019.00016(67-70)Online publication date: Nov-2019
https://doi.org/10.1109/IA349570.2019.00016
Vasiou EShkurko KMallett IBrunvand EYuksel C(2018)A detailed study of ray tracing performanceThe Visual Computer: International Journal of Computer Graphics10.1007/s00371-018-1532-834:6-8(875-885)Online publication date: 1-Jun-2018
https://dl.acm.org/doi/10.1007/s00371-018-1532-8
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Why graphics programmers need to know about DRAM

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SIGGRAPH '14: ACM SIGGRAPH 2014 Courses

July 2014

2191 pages

ISBN:9781450329620

DOI:10.1145/2614028

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Published: 27 July 2014

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SIGGRAPH '14: Special Interest Group on Computer Graphics and Ineractive Techniques Conference

August 10 - 14, 2014

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Vasiou EShkurko KBrunvand EYuksel C(2022)Mach-RT: A Many Chip Architecture for High Performance Ray TracingIEEE Transactions on Visualization and Computer Graphics10.1109/TVCG.2020.302104828:3(1585-1596)Online publication date: 1-Mar-2022
https://doi.org/10.1109/TVCG.2020.3021048
Green OFox JYoung JShirako JBader D(2019)Performance Impact of Memory Channels on Sparse and Irregular Algorithms2019 IEEE/ACM 9th Workshop on Irregular Applications: Architectures and Algorithms (IA3)10.1109/IA349570.2019.00016(67-70)Online publication date: Nov-2019
https://doi.org/10.1109/IA349570.2019.00016
Vasiou EShkurko KMallett IBrunvand EYuksel C(2018)A detailed study of ray tracing performanceThe Visual Computer: International Journal of Computer Graphics10.1007/s00371-018-1532-834:6-8(875-885)Online publication date: 1-Jun-2018
https://dl.acm.org/doi/10.1007/s00371-018-1532-8
Shkurko KGrant TKopta DMallett IYuksel CBrunvand EMcGuire MPatney A(2017)Dual streaming for hardware-accelerated ray tracingProceedings of High Performance Graphics10.1145/3105762.3105771(1-11)Online publication date: 28-Jul-2017
https://dl.acm.org/doi/10.1145/3105762.3105771
Kopta DBrunvand E(2017)Power and energy implications of misunderstanding DRAM2017 Eighth International Green and Sustainable Computing Conference (IGSC)10.1109/IGCC.2017.8323589(1-6)Online publication date: Oct-2017
https://doi.org/10.1109/IGCC.2017.8323589

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Exploiting Refresh Effect of DRAM Read Operations: A Practical Approach to Low-Power Refresh

VRL-DRAM: improving DRAM performance via variable refresh latency

Multiple clone row DRAM: a low latency and area optimized DRAM

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Exploiting Refresh Effect of DRAM Read Operations: A Practical Approach to Low-Power Refresh

VRL-DRAM: improving DRAM performance via variable refresh latency

Multiple clone row DRAM: a low latency and area optimized DRAM

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